Need Verilog and MIPS programmer
Need someone to design an MME processor
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Need to write a C test bench in Vivado HLS
Need to write a C test bench in Vivado HLS
Read moreNeed help with C/C++ code
I am writing a C/C++ program where I want to load a CSV matrix to test a C code, a sample example is attached , pls read then we will discuss it further.
Read moreVerilog, SV & UVM Trainer
We are looking for a trainer, who teach online Verilog, SV & UVM to students
Read moreNeed a FPGA hardware accelerator expert using Vivado High Level Synthesis using C
Need an expert using Vivado High Level Synthesis using C
Read moreNeed an expert in Vivado High Level Sythesis using C
Need an expert in Vivado High Level Sythesis using C
Read moreNeed an expert in Vivado HLS -- 2
Need an expert proficient in Vivado HLS
Read moreNeed an expert in Vivado HLS
Need an expert in Vivado HLS to implement median filter using C. The testbench would have to created using C itself.
Read moreIMPLMENTATION OF BEMD STEGANOGRAPHY ALGORITHM USING FPGA (verilog code)
- write Verilog code for steganography algorithm so that I can be implemented on FPGA - using Verilog Xilinx ise have to write module code & test bench where it...
Read moreVHDL Project
Hello everyone, I have to do a project in vhdl language. I have a list of 10/15 projects from which I have to choose one. The to-do list is: 1) report on the wo...
Read moreNeed to convert MATLAB code to VHDL code
I have a MATLAB code and want this to be converted to HDL code using HDL Coder feature available in MATLAB. I have attached the error what i am getting currentl...
Read moreHELP ME WITH RTL CODING OF AXI BFM
These are the blocks. TO BE CODED in Verilog or system verilog. REGISTER BLOCK IS APB COMPLIANT. A USER SHOULD BE ABLE TO READ AND AND WRITE THE REGISTERS IN TH...
Read moreTroubleshooting and implementation of EdDSA algorithm in Vivado Design Suite
I am looking for an FPGA (Verilog) expert who can help me to troubleshoot and implement the EdDSA algorithm in Xilinx Vivado Design Suite. The Vivado project fi...
Read moreHP200LX ROM DEBUG PROJECT
A motherboard of HP200LX will be provided by the postal office for the purpose of extracting all the content of the ROM.
Read moreHelp Required in Debugging of C Project Conversion into RTL/Verilog using Vivado HLS
I am looking for a Xilinx Vivado HLS expert who can help me to debug a complete C project conversion into RTL/Verilog that can be further used in Vivado Design...
Read moreTraining/Consulting in Hardware: FPGA/RTL/PCI(e)/Foundations (and FireSim as plus)
I would like to learn more about Hardware to prepare myself to work with the development of device drivers for more complex hardware. I need someone with knowle...
Read moreFPGA based implementation of Ed25519 signature algorithm
I need to implement a fast and area-efficient design of the Ed25519 algorithm in Xilinx Vivado Design Suite using Verilog. FPGA experts are required. Please fin...
Read moreverilog code
The task is to design an Arithmetic Unit, and then to write a complete code for functional verification. You should search for information about the following t...
Read moreImplementation and Testing of FPGA based Blockchain System
I require the implementation and testing of a blockchain hardware accelerator using the Xilinx FPGA board. Expertise in Go Programming, Verilog/FPGA, and Blockc...
Read moreImplementation and Testing of Blockchain Hardware Accelerator
I need to implement and test the blockchain hardware accelerator using the Xilinx FPGA board. Expertise in GO, Verilog/FPGA, and Blockchain are required. Please...
Read moreSynthesis and Simulation of Verilog project in Vivado Design Suite
I need to synthesize and simulate a Verilog code of ECDSA in the Vivado design suite. Complete project code is already available. Looking for an FPGA expert who...
Read moreDesign and Implementation of FPGA based system in Xilinx Vivado
I need to implement an FPGA-based system in Xilinx Vivado Design Suite using Verilog. FPGA expert is urgently required. Complete details of the project are prov...
Read moreDesign and Implementation of FPGA based system in Vivado Design Suite
I need to implement an FPGA-based system in Xilinx Vivado Design Suite using Verilog. FPGA expert is urgently required. Complete details of the project are give...
Read moreImplementation of Xilinx FPGA-BASED Design in Vivado Design Suite
I need to implement a complete FPGA system using Verilog in Vivado Design Suite. Professional FPGA experts are required. Please find the details of the project...
Read moreN bit Montgomery Radix 8 bit multiplier
Required the verilog implementation of N bit Montgomery Radix 8 bit multiplier and for addition use the CLA adder.
Read moreBasys 3 DIGILENT WITH 4X4 matrix keyboard
Corrimiento de dígitos en display 7 segmentos: Este código tiene como objetivo mostrar y correr el número que se vaya escribiendo con el teclado matricial. Cada...
Read moreFPGA Final Project - Camera that follows a person
Using Pynq Z2 FPGA to connect a camera (OV7670 - CMOS Sensor), and then display the video on a monitor through HDMI output. The Project is built using VHDL lang...
Read moreFPGA PROGRAMMING - Create A Specific Algorithm
Hello, I'm hiring a dev who's very hot with FGPA. Need him to create cryptocurrency miner/blockchain. Specificly Xilinx Alveo U200 & U250 Cards. I can pay a lot...
Read moreIMPLEMENTATION of Xilinx FPGA-BASED HARDWARE ACCELERATOR in VIVADO DESIGN SUITE
I need to implement a complete FPGA system using Verilog in Vivado Design Suite. Professional FPGA experts are required. Please find the details of the project...
Read moreFPGA-based implementation of a cryptographic system for IoT applications
I need to implement FPGA-based implementation of a cryptographic system for IoT applications with Xilinx FPGA. Please go through the attachments for complete de...
Read moreFEC RS(198,194) Verilog
I want go get help to implement FEC RS(198, 194)
Read moreFEC RS(198, 194)
Verilog FPGA Code implementation of FEC RS(198, 194) decoder.
Read moreFMCW / Phased Array Radar / SDR receiver design -- 3
I am looking for a freelancer or team that has extensive expertise in RF radar design and SDR receiver design, hardware, and firmware. More details on PM. Thank...
Read morevhdl expert
I want Signal processing and VHDL(Quartus Application) expert.
Read moreWire Chamber DAQ
Building DAQ Hardware + Firmware for Wire Chamber Detector
Read moreModified USRP SDR design.
Hello there!, Looking for skilled guys who have both hardware and software knowledge on SDR.The scope of the project is to modify hardware of existing USRP SDR...
Read moreCreate an IC Chip Design Document - Verilog -- 2
I want you to desgin an IC chip description document. I need you to understand the verilog design and create some design descriotions, describing its fucntions...
Read moreCodificador e Detector de Erros - VHDL
A presença de erros em dados digitais é um problema frequente em sistemas computacionais que lidam com transmissão e armazenamento de informação. Em alguns cont...
Read moreCreate an IC Chip Design Document - Verilog
I want you to understand the code and write a written description of the chip design with all the modules and create a document explainnig the function of the c...
Read moreFPGA Packets Delay
The project consists in implementing a buffer delay on a 100G traffic done in an Xilinx Alveo FPGA
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