HELP ME WITH RTL CODING OF AXI BFM
Budget: ₹1,500 – ₹12,500 INR
These are the blocks. TO BE CODED in Verilog or system verilog.
REGISTER BLOCK IS APB COMPLIANT.
A USER SHOULD BE ABLE TO READ AND AND WRITE THE REGISTERS IN THE REGISTER BLOCK USING APB PROTOCOL.
THE REGISTERS ARE THE AXI READ AND WRITE DATA CHANNEL SIGNALS.EX- ARADDR, ARBURST, ARPROT, ARSIZE, ALEN etc.(all the read channel registers).
These registers should be given as inputs to the READ TRANSACTION GENERATOR BLOCK.
This block should be able to generate the AXI legal transactions without using handshake signals.
Transactions should be stored in FIFO and later BFM pops up the transactions and gives it to the AXI bus.
BFM acts like AXI master.
REGISTER BLOCK IS APB COMPLIANT.
A USER SHOULD BE ABLE TO READ AND AND WRITE THE REGISTERS IN THE REGISTER BLOCK USING APB PROTOCOL.
THE REGISTERS ARE THE AXI READ AND WRITE DATA CHANNEL SIGNALS.EX- ARADDR, ARBURST, ARPROT, ARSIZE, ALEN etc.(all the read channel registers).
These registers should be given as inputs to the READ TRANSACTION GENERATOR BLOCK.
This block should be able to generate the AXI legal transactions without using handshake signals.
Transactions should be stored in FIFO and later BFM pops up the transactions and gives it to the AXI bus.
BFM acts like AXI master.