FPGA projects — HireLancer archive

ID / Date Listing

HL-34222743

FPGA implementation of a cryptographic system

Please go through the attachments for project details. Only serious and capable professionals are required.

HL-34221849

Real time tracking system for underground tunnels

Real time tracking system for for underground tunnels, with tracking accuracy within 1 m

HL-34206478

Design and implementation of FPGA accelerator for crypto applications

Please find the details of the project in the attachments.

HL-34206175

IMPLEMENTATION OF FPGA BASED HARDWARE ACCELERATOR -- 2

I need to implement a fast and area-efficient design FPGA-based accelerator in Vivdao design Suite. Please find the details of the project in the attached docum...

HL-34205670

variable size matrix multiplication VHDL Vivado

the task is to develop and implement on synthesizable matrix multiplier kernels the simulation result compare with the result of matlab , the test platform read...

HL-34204139

Looking for Digital assist

The task is to copy questions, options, answers, solutions from pdf to excel in the given format below. Please check the attachment for examples. Your task is t...

HL-34198962

IMPLEMENTATION OF FPGA BASED HARDWARE ACCELERATOR

I need to implement a fast and area-efficient design FPGA-based accelerator in Vivdao design Suite. Please find the details of the project in the attached docum...

HL-34198919

IMPLEMENTATION OF FPGA BASED HARDWARE ACCELERATOR

I need to implement a fast and area-efficient design FPGA-based accelerator in Vivdao design Suite. Please find the details of the project in the attached docum...

HL-34186091

Digital system, the project is a task based on VHDL and Boundary Scan Logic

It is about Questions referring to boundary scan logic. For example like how to detect faults at board level using boundary scan logic and questions about FSM w...

HL-34161909

Create a I2C Master Testbench to communicate with Slave

I have the code for I2C slave. I want help in writing the verilog code for I2C Master testbench to communicate with the given slave. It can send a few i2C write...

HL-34156660

Create a heirarichal block digram for each module with input/output signals

I have the following verilog code provided. i want help in reviewing the verilog code and creating a desing document explaning the code (Main file - top.v) i.e....

HL-34145105

Zynq + SPI + IRQ - knowledge & code template needed

I am seeking someone familiar with Zynq + Linux development to provide a template for a larger project that I want to implement myself. I have a very basic Zynq...

HL-34134226

Design & Implement Arbiter PUF (Physical Unclonable Function) on FPGA Terasic DE10 Nano -- 2

Creating 2-chain Arbiter PUF on specific FPGA with 64-stages MUX for each chain. The output response PUF will be sent to external device, i.e. Arduino (microcon...

HL-34124565

VHDL Project (Code + Report)

Hello everyone, I have to do a project in vhdl language. I have a list of 10/15 projects from which I have to choose one. The to-do list is: 1) report on the wo...

HL-34117708

Energy-Efficient Logarithmic Square Rooter for Error-Resilient Applications -- 2

I need Verilog code for Energy-Efficient Logarithmic Square Rooter. It should be done within 1-2 days maximum.

HL-34116738

variable size and integer type matrix multiplication (Vivado,VHDL) -- 2

the version of Vivado software is 2018.3. I could provide my project, I need someone to help modify my code to achieve correct function. the test data is produc...

HL-34115418

Energy-Efficient Logarithmic Square Rooter for Error-Resilient Applications

I need Verilog code for the paper attached below. It should be done within 1-2 days maximum.

HL-34095185

SPI interface from a FPGA and a GPU

Need help with code and set up for SPI protocol to send data from an FPGA to a GPU, explain code/software procedure and wiring. can forward technical specs for...

HL-34085375

variable size and integer type matrix multiplication (Vivado,VHDL)

I have a project and I need someone to modify my code according to my logic to achieve this function, the test data is produced by matlab

HL-34061484

Conversion of project from Xilinx to Quartus

A complete color sorter Machine Firmware needs to be converted into Intel Quartus Project, The project contains IP Cores as well as softcore processor and the v...

HL-34052453

I need a vlsi engineer

I have attached the details below

HL-34022129

FPGA Programmer 1

The project requires an Embedded Programmer having experience in Driver Programming for FPGA cards, PCIe Interface and YOCTO as well as upbringing the Linux OS.

HL-34021196

Help with Petalinux -- 2

Hi, I created a project (Vivado/Petalinux) that worked fine. Basically this project has a AXI4-Lite peripheral to write/read from the PL/PS. I did this some mon...

HL-34010403

Realization of Adaptive Beamformer for Angle of Arrival Estimation using FPGA and Xilinx System Generator

FPGA and Xilinx System Generator

HL-33986053

Implementation of Cryptographic Algorithm for an IoT application

I need to implement an FPGA-based cryptographic algorithm for a decentralized IoT application in Vivado Design Suite. Anyone who has a good command of Verilog i...

HL-33930886

FMCW / Phased Array Radar / SDR receiver design -- 2

I am looking for a freelancer or team that has extensive expertise in RF radar design and SDR receiver design, hardware, and firmware. More details on PM. Thank...

HL-33914951

Morse code encoder and decoder in VHDL

We need a project done in Morse code encoder and decoder in VHDL. Our project contains 2 parts a transmitter and receiver. The transmitter part receives the tex...

HL-33905365

STM32CubeIDE and VHDL quartus

STM32 toolchain and also vhdl design with report describing the procedures

HL-33902322

FPGA Altera implementation

Implement the circuit design in the FPGA, and read input /write output to the file. Including timing analysis, power consumption and pin planner etc... Using Qu...

HL-33902150

quartus and modulsim

i want some vhdl coding simulating with test bench on modulsim and a report

HL-33899743

FPGA Project

I need to do simple FPGA project on Boolean Board (Real Digital). For example Tic Tac Toe game. software should be Vivado and programming should be done in Veri...

HL-33864058

Timing analysis: Implement a timing analysis tool for a multithreaded hardware/software RTOS

The tool should capture timing metrices such as Communication Times of synchronisation primitives, Execution Time, latency, delay, WCET

HL-33863312

Verilog program to fpga

Program on vivado (verilog), morse code. Binary for "BASYS 3" fpga, simulation, files...etc More details via chat

HL-33858018

Conversion of C Project into Verilog for FPGA Implementation

I need to implement an Ed25519 Algorithm in Verilog for FPGA implementation that can properly simulate on Xilinx Vivado Design Suite. The complete algorithm cod...

HL-33854734

Find bug in pixel manipulation

Analyse and find pixels in memory and RAM

HL-33854041

Real time system evaluation

It is about collecting and evaluating statistics in a Real time multithreaded computer system(both in hardware and software) based on FreeRTOS.

HL-33838798

Find and fix bug in a state machine of an existing design

I used AXI dma to verify that the neural network's inner workings were functioning appropriately. In a different configuration, we must ensure that we are appro...

HL-33831968

vhdl RISC processor coding

I need a vhdl master to code a RISC processor with multiple components. I will give the detailed information.

HL-33813488

FPGA Developer

I have rich experience with FPGA I developed FPGA based IDS(Intrusion Detection System) I am strong at C, C++, Verilog and son on

HL-33813191

Looking an Experienced FPGA Developer for UFS Host device -- 3

using Artix 7 implement Master UFS protocol design for the UFS Host device, Feel free to contact who's have experince on Stroage's(emmc, ufs, nand e.t.c) Skills...