VHDL Project

Job ID: 34524434

Budget: €30 – €250 EUR

Hello everyone, I have to do a project in vhdl language. I have a list of 10/15 projects from which I have to choose one.
The to-do list is:
1) report on the work done;
2) source code (in VHDL or other languages);
3) any examples for the code.

The report typically consists of:
- An overview of the topic.
- A description of the methodology followed to carry out the project highlighting what are thought to be the most interesting contributions of the work done.
- A high-level description of the code (it doesn't matter to put all the listings) and any instructions for use and compilation.
- A description of the results obtained (simulations, statistics, algorithm outputs).