Verilog / VHDL projects — HireLancer archive

ID / Date Listing

Matlab Expert required

More details will be shared via chat

Decentralised DC load shedding

A DC network with 3 DER that can be tripped when the load is greater than the generation. it involves simulation in simulink .

HL-32297222

Verilog/VHDL

I need a person who can do verilog

HL-32297030

Verilog/System Verilog microproject

This is a micro project meant to be coded in Verilog using System Verilog features too. We are provided with the base file which also has the testbench. We just...

HL-32296001

Codec implementation

Implement the video codec work flow which is simulated in the vivado on the Zync board

HL-32292298

FPGA4student

This VHDL project is to design and implement noise filtering, metastabiliy and synchronization of given signals

HL-32291885

design of interpreter & implementation

Implement an interpreter for the language which i created & the sample programs are all in the programming language which i have invented, and run with the inte...

HL-32291812

Dc motor pwm , vhdl using fpga -- 4

I want program code and testbench for Dc motor pwm by vhdl and using fpga Model of fpga kit ( DE10-Lite) and I hope all of these including in the report also si...

HL-32291017

vhdl encoder

I am looking for a real-time A-law/U-law encoder written in VHDL for implementing in a Lattice XP2 FPGA. The input to the encoder will be 16 bit PCM16, the outp...

HL-32289279

Phase Shifter and Frequency Calculator in VHDL

Need help creating a Frequency Calculator and a Phase Shifter for 90 degrees in VHDL

HL-32289235

SRAM vlsi design -- 2

Implement an SRAM circuit that has a 32 bytes with its associated decoder and multiplexer. The SRAM memory must have the following properties: 1- Addresses are...

HL-32289148

Making a Blinking LED Project using IC PCF7926ATT

Making a Blinking LED Project using IC PCF7926ATT/C1AC07J : 1- Source code for this Blink Circuit 2- The IDE that used to making the Source code 3- The programm...

HL-32288808

Quartus II / VHDL Coding

I am looking for an expert to do coding in VHDL language and then do simulation in Quartus II. I will share work details in chat

HL-32288773

FPGA design

Port design from Max10 FPGA to Lattice LFE5U part

HL-32288756

Simple FSM using verilog

Implement a FSM to detect a sequence of “101”. (Ex: 10101: will be detected as two “101”; 101101: will be detected as two “101”) • The input sequence is set by...

HL-32288707

SRAM vlsi design

Implement an SRAM circuit that has a 32 bytes with its associated decoder and multiplexer. The SRAM memory must have the following properties: 1- Addresses are...

HL-32288450

Video transiver over ethernt de2-115

Hello, I need design video transivver use de2-115 FPGA use SystemVerilog, ethernet and usb camera Rettru Mini HD 1080P. Video must be encrypted aes-256. De2-115...

HL-32287974

SRAM vlsi design

A VLSI design i need to implement using (magic) and test it using (irsim) it's a circuit i design it and the phase 2 i want it is to implement and test the desi...

HL-32283635

Verilog programming(traffic light controller)

I have a Verilog project and the code must be written/edited and the get tested(stimulated) using my test benches. you must use Modelsim to check if you've pass...

HL-32278043

c expert system design expert

looking for system design expert to help my client design an irrigation (optimized water cooling and monitoring system) for his farm - long term - 3 month proje...

HL-32277751

Design an ALU Using Verilog

Top cell : alu I/O: bit 15 is the most significant bit. INPUTS: A(15:0) , B(15:0) , alu_code(4:0) ; OUTPUTS: C(15:0) overflow TOP MODULE: 16-bit Adder Module PR...

HL-32277279

FPGA Miner For Equihash 125,4

I would like a FPGA miner for Equihash 125,4

HL-32275521

verilog VHDL and MIPS program support

looking support for the verilog program and MIPS urgently . this tasks to be tested in vivado software . here i am attaching the detailed information for the ta...

HL-32274420

12/24 hr clock implementation in VHDL

I want a code for 12/24 hr clock implementation in VHDLon basys 3 board

HL-32269785

Proyecto de circuito en Logisim

HL-32269102

VHDL expert needed for computer architecture project -- 2

I have some tasks related to computer architecture. I want someone who is an expert in VHDL.

HL-32268665

VHDL expert needed for computer architecture project

I have some tasks related to computer architecture. I want someone who is an expert in VHDL.

HL-32268081

Program two microcontrollers -- 2

Program microcontrollers and provide code for cloning and or copy process etc.

HL-32268064

Needed a VHDL programmer -- 2

Needed a VHDL programmer having experience with multisim or any vhdl programming software.

HL-32267068

VHDL/Verilog Project -- 3

Please message me for more details. For this project, I will send you zip fie that has all information.

HL-32265547

Computer Architecture

hello I need help in a project on a computer architecture ,mips, arm , LEGv8

HL-32265243

FPGA Verification UVM specialised engineer

Hi Looking for person who can support work from office or concern that can contract people to work for projects ( test bench development/ requirements writing /...

HL-32264598

MIPS programming expert needed

HL-32262965

Microprocessor Project

I have a project on mips and LEGv8 and need help

HL-32260142

Write a vhdl code as per instructions

Write vhdl language code as per instructions in pdf file attached.

HL-32259704

Design of ADC controller by VHDL

I want to convert VHDL code to VERILOG code.

HL-32259545

Simple Neural Evaluation

The EE 272 Simple Neural Evaluation engine takes weights for a neural network, and applies them to input data. The design is flexible and assumes very little ab...

HL-32259563

Simple Neural Evaluation -- 2

The EE 272 Simple Neural Evaluation engine takes weights for a neural network, and applies them to input data. The design is flexible, and assumes very little a...

HL-32258042

Need someone who is experts in MIPS

HL-32257774

verilog coding using ModelSim

looking for some help with my verilog coding project using ModelSim. please bid if you can