Verilog / VHDL projects — HireLancer archive

ID / Date Listing

MIPS instructions and simple Assembly -- 3

MIPS instructions and simple Assembly

Simulate basic aritmatic calculator using VHDL -- 2

I need this mini project in VHDL with all displayed on display. YouTube link is there for calculator help to understand. According to that program it. https://y...

HL-32254888

simulation using proteus

waste segregation conveyor with metal detector and moisture sensor simulation using proteus

HL-32254637

Need someone good expert in computer architecture -- 3

Need someone good expert in computer architecture In this project, you will be implementing a pipelined MIPS processor datapath with the following features: 1)...

HL-32251818

VHDL CODE WITH TEST SETUP -- 2

Multiplication and addition of two 16 bit numbers with various resource constraints. Below is the expression : Y= x0h0+x1h1+x2h2.........x0h9. You should perfor...

HL-32251529

Analog to digital Converter Project

Design a 4 bits Analog to Digital Converter (ADC) to convert analog input from 0 to 9 V and use it in a fire alarm detection system. Deadline within 24 hours. B...

HL-32250725

VHDL/Verilog Project -- 2

Please message me for details.

HL-32248854

need help to design a circuit for shock generator

i am working on project where i have to generate same sort of shock that normally shock book park generates. please let me know if you can help me with that.

HL-32247163

MIPS processor datapath

Need someone who is experts in MIPS

HL-32243561

Carry Save Adder Systemverilog

Hey, I am looking to implement a carry-save adder in System verilog

HL-32242239

Design an 8-bit Addressable Latch with built in 1 of 8 Decoder -- 7

The project is half done and I am looking for someone who can finish the rest. Topology needs to be used with CMOS in the circuit. Design each logic block for t...

HL-32242170

Measuring Fourier Transform of Sampled Signal: Sample and Hold Circuit

HL-32240081

Needed a VHDL programmer

Needed a VHDL programmer having experience with multisim or any vhdl programming software.

HL-32236512

Program a microcontroller

I need help programming a microcontroller (PIC16LF1902-I/SS). The micros job is to count the duration of a momentary switch being activated, and compare that ti...

HL-32235952

monitoring of Zynq Ultrascale +

Using Vitis + Vivado build a software routine to monitor the execution of software on a heterogeneous platform (Zynq Ultrascale +). The monitoring systems are a...

HL-32234332

System Verilog Project

Need help with improving an existing system verilog code. Reach out to me if you have experience with system verilog code.

HL-32231085

VHDL code with test bench setup (Convolution Problem)

Two 16-bit number from X0 and X9 and H0 to H9 multiply them and add them . Code shall be done in VHDL Y= x0h0+x1h1+x2h2+x3h3+........x9h9. For more details find...

HL-32229230

MIPS instructions and simple Assembly -- 2

MIPS instructions and simple Assembly

HL-32226637

orCAD Software Expert

Task1: An audio signal processor has to attenuate a specific range of frequencies in the specified stop band and allowing the frequencies to pass outside the st...

HL-32225904

VHDL designer using Altera DE2 115

scrolling display message board pls use the assign ports here is the denouncer provide library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; enti...

HL-32220472

Circuit design

Need a circuit integrating multiple simple circuits

HL-32219378

Noise filtering system ModelSim , Matlab ,Xilinx , VHDL, Embedded systems -- 3

The project is to design a system with an FIR filter for voice filtering in real-time. The work will be on Xilinx and Modelsim to design the system and also wit...

HL-32219273

Noise filtering system ModelSim , Matlab ,Xilinx , VHDL, Embedded systems -- 2

The project is to design a system with an FIR filter for voice filtering in real-time. The work will be on Xilinx and Modelsim to design the system and also wit...

HL-32218494

Verilog Egg Timer

See text attachment for project

HL-32217864

Basic calculator using vivado on basys3 fpga

To whom it may concern, I'm looking for someone experienced who can develop a basic calculator using verilog on vivado with specific requirements in a short per...

HL-32215610

Verilog on a weekend :)

Hi, I have a couple of Verilog questions and would be happy to pay to pick someones brain! Attached is a simple HLS program that I synthesized to Verilog. I hav...

HL-32214878

Dc motor pwm , vhdl using fpga -- 3

I want code and testbench for Dc motor pwm by vhdl and using fpga Model of fpga kit (DE10-Lite) and I need report about a project

HL-32214771

Dc motor pwm , vhdl using fpga

I want code and testbench for Dc motor pwm by vhdl and using fpga Model of fpga kit ( DE10-Lite)

HL-32213119

MATALB AND SIMULINK EXPERT RELATED TO COMMUNICATION SYSTEMS -- 5

Design and implement an end-to-end digital communication link over a poor-quality communication channel using MATLAB simulation software

HL-32210595

MIPS project in Mars Expert needed

HL-32210121

Need someone good expert in computer architecture -- 2

you will be implementing a pipelined MIPS processor datapath with the following features: 1) FDEMW 5-stage pipeline with branch

HL-32209018

FPGA acceleration for optimized DNN

I am interested to work on a long-term research project where I need to conduct a depth study to find a gap or modify method (Approach) in the area of FPGA acce...

HL-32206205

FPGA Project

1 Verilog/VHDL Programming language 2 Understanding of the protocol and standards 3 FPGA knowledge & Programming hands on 4 Knowledge of the safety standards. O...

HL-32205826

VERILOG code

i need people who are very proficient in verilog, i will be giving few tricky question they need to help me

HL-32204896

Adder Architecture

Need help designing an adder architecture in Verilog/Systemverilog.

HL-32203264

code using SPIM & MIPS instructions& intermediate code statements

HL-32202443

Verilog programming-2

Verilog programming project using Vivado. please bid if you can assist

HL-32202214

MATALB AND SIMULINK EXPERT RELATED TO COMMUNICATION SYSTEMS -- 4

Design and implement an end-to-end digital communication link over a poor-quality communication channel using MATLAB simulation software

HL-32202097

Need someone good expert in computer architecture

you will be implementing a pipelined MIPS processor datapath with the following features: 1) FDEMW 5-stage pipeline with branch

HL-32201571

Egg Timer Verilog Code -- 2

Design egg timer in verilog code as seen below. Inputs to the FPGA include: 100MHz clock, BTNL/BTNR/BTNU/BTND push buttons, SW0/SW15 slide switches. Outputs fro...