Verilog / VHDL projects — HireLancer archive

ID / Date Listing

Implementation of Gradient Descent Optimization Algorithms on FPGA in verilog language which is sythesizable .

below file i.e gradient_optimization_algorithms.txt shows python code for all gradient optimization algorithms. below file i.e input for nadam method.txt shows...

HL-35758187

audio in FFT to 16 bit serial out microcontroller invironment

I need someone to code in C++ a design format for a small experiment. INPUT = audio and my OUTPUT = 16 bits serial I want the program to ask me how many frequen...

HL-35704184

Expert on VHDL and FPGA (only expert required) -- 2

I am looking to hire an individual who really understand this subject. should be able to solve any problems related to this subject. communicate and be able to...

HL-35695794

Aparat de cafea in VHDL

Crearea unui aparat de cafea in VHDL(rulabil in programul Vivado) intr-un limbaj cat mai simplist indeplinind cerintele din documentul atasat.

HL-35684712

line following bot

I need code for my bot who follow the given line using line sensor. this code should be written in verilog language and fpga cyclone 4 is used as board.

HL-35678962

FPGA Engineer

We are in the need of FPGA Engineer for a SDR product. We want to maximize the Power Output of SDR (Software Defined Radio) with the use of Amplifiers. You can...

HL-35672047

I need a verilog project- single image dehazing using dark channel prior

dark channel prior basically computes the minimum of rgb values present in a single pixel and assigns that value to the pixels. Once that is done, a patch of pi...

HL-35663680

WSN system for fault detection in power system network

my topic is need to achieve the following steps by using Matlab and blynk app 1. To design and develop a WSN system integrated with a power protection scheme to...

HL-35670767

WSN system for fault detection in power system network -- 2

I need the achieve the following steps by using Matlab and blynk app software: 1. To design and develop a WSN system integrated with a power protection scheme t...

HL-35649306

8 bit Approximate multiplier- VLSI

building an approximate 8x8 multiplier using a compressor and building any application-oriented

HL-35643919

Real-time object detection using FPGA

Input(Live video) is accessed from the camera connected to the board and output should be displayed in the monitor connected to the FPGA board. and output shoul...

HL-35641076

INTERVIEW PREPARATION GUIDE !

I am a verification engineer in Bangalore India, and preparing for Top Semiconductor Companies Interview Process like INTEL, NVIDIA , GOOGLE , Qualcomm, NXP Sem...

HL-35639761

Operaciones aritméticas con signo y bus compartido

Realizar un circuito combinacional que realice operaciones binarias con datos de 8 bits con signo (1 bit signo, 3 bits enteros, 4 bits fracción) y despliegue el...

HL-35635578

PL-PS data transmission in vivado

Accessing ADC data from PL ,store in memory and reading from PS.

HL-35618124

Vivado project

Trying to access ADC data and store in memory and trying to read those data from memory

HL-35614351

XTEA Light Encryption-Decryption Engine

In this project students are asked to implement a an XTEA Encryption/Decryption VHDL Engine, implemented in both C code and VHDL code. It supposed to be built a...

HL-35613008

FPGA system

Hi I need a expert in red pitaya.I want to design project using red pitaya

HL-35609621

Vhdl projects

The VHSIC Hardware Description Language (VHDL) is a hardware description language (HDL) that can model the behavior and structure of digital systems at multiple...

HL-35599202

Develop and implement Fine State Machine (FSM) for Basys2 board

-Developing FSM structure ( Algorithm or state diagram ) -Test developed FSM in Modelsim -Implement design employing Basys2 board

HL-35587147

Vhdl for video processing FPGA

We need a VHDL designer with expertise on video processing codec.

HL-35576762

Multi Channel DMA

Implement a multi channel DMA data generator/logger

HL-35575886

fpga video processing pipeline.

accept digital RGB input (24bit + HS VS DE) in one resolution, output digital RGB output (24bit + HS VS DE) in another resolution. Features required : 1. option...

HL-35573851

Formal analysis and verification for SDN

I am looking for formal analysis and verification base on high order logic with theorm prover or any other tools such as z notation and petrine etct. It just to...

HL-35572441

IIC Not Working Properly on Xilinx Artix FPGA

I need to use Xilinx IIC IP on Artix board as a master, I used it in master mode and it didn't work well (The generated signal seems to be random) I tried the I...

HL-35541109

Verilog progrmaming language

I need some help with my Verilog progrmaming language. Please bid if you can assist me.

HL-35535800

vlsi uart

In uart design modify shift register

HL-35530176

Build verilog simulations

Two tasks based on verilog, serial adder and RTL for APB based protocol. More information will be shared later. Deadline - 2days[maximum] Price - 75AUD

HL-35526323

microprocessor system

I need a expert who can work on tiny microprocessor which consumes low power and is very fast including ADC.

HL-35494367

XTEA Encryption/Decryption VHDL Engine

Hello can you help me with this project it’s going to be similar to lab 4 that I have attached. I have attached the project pdf too (CMPE_487_PROJECT.pdf 193.22...

HL-35523307

I need a Verilog/Vivado expert -- 2

Im working on a Simon Says project that needs to be implemented on a Xillinx FPGA. It alsof includes memory, FSM

HL-35523306

I need a Verilog/Vivado expert

Im working on a Simon Says project that needs to be implemented on a Xillinx FPGA. It alsof includes memory, FSM

HL-35501283

Tang Nano 9K BitCoin FPGA Miner

Looking for a team to support an open source fork of github.com/archlab-naist/Double-CME-SHA256 integrated into fork of github.com/luke-jr/bfgminer, or better/s...

HL-35493452

Debounce attached code

The following program has a bounce issue. Integrate a denounce program into the attached Adruino code.

HL-35492471

System Design and VHDL expert

System Design and VHDL expert for urgent Task

HL-35491333

frdm-kl25z board project with keil uvision5

I have a completed embedded project using couple sensors and modules written on mcuxpresso ide which uses frdm-kl25z nxp board. I want to make the project work...

HL-35489426

VHDL Project

The VHSIC Hardware Description Language (VHDL) is a hardware description language (HDL) that can model the behavior and structure of digital systems at multiple...

HL-35482159

I need vhdl code

1010 sequence dectectorwith 20 bit frame with consecutively 3 frames with 16 bit payload and 4 bit header

HL-35479311

Fpga setup

We are a high frequency trading startup based out of India and we are looking to setup an fpga based trading infrastructure

HL-35477513

Fpga setup

We are a high frequency trading startup based out of India and we are looking to setup an fpga based trading infrastructure.

HL-35472115

Digital Verilog

1) Frequency divider by - / 2n - / by any integer 2) Serial Peripheral Interface (SPI) - Both master and slave 3) UART TX/RX - Asynchronous serial communication...