Verilog / VHDL projects — HireLancer archive

ID / Date Listing

It is a IoT based project in which we are detecting many health parameters. we need a developer that is good to designing a chip or VLSI designer that can help...

HL-35452285

Need a C# and VHDL developer

The budget is $50. You will wire down a vhdl in Vivado to display 4 digit intiger on a display of basys3 board. The data will be arrived with a UART port. You c...

HL-35440097

timing waveforms for vhdl code

I have vhdl code. i need timing waveform from modelsim .

HL-35431321

Write VHDL code for Vivado

I have a file in VHDL that I want to rewrite. The file uses "process" but we want to rewrite it using components. We have some of the modules you could use alre...

HL-35429924

Verilog programming

Multicycle Processor Controller

HL-35401601

DSP engineer

Looking for expertise in developing hearing aid circuit

HL-35398644

Drone navigation and planning algorithm.

Hello,i am looking for guys who could implement drone navigation control, sensor fusion,task allocation, collision avoidance and data sharing between drones for...

HL-35398287

Object detection and classification using FPGA

Hello guys, I am looking for skilled FPGA programmer who could implement machine learning (object detection & classification) of tiny metal objects etc on a FPG...

HL-35395140

MIPS Expert for Assemple language project

Looking for an expert who can tackle MIPS Projects

HL-35391859

Verilog Coding

We need to program a FPGA board using verilog code with XNOR, Multiply, shiftleft and add modules that can run on the board using different switches. When we co...

HL-35378194

BLDC Motor Control

Can you make pi loop bldc motor control application with ch32v307 risc-v microcontroller hall sensor six step algorithm? If you do, please make sure it is simpl...

HL-35365922

AVR Basic To C

Converting AVR Basic Project to C.

HL-35359595

Make an encoder (Mux) 7 segments must be made in 8-bit Microprocessor: Picoblaze

1. Make an encoder (Mux) 7 segments must be made in 8-bit Microprocessor: Picoblaze using the attached file (Assembly coding, KCPSM6, ROM FILE).

HL-35357565

I'm looking for the support for doing my project work

Hi, I would like to know the best rate for doing one of project work. attched details for the project requirement.

HL-35356521

Verilog circuit modelling

The entire description of the project is in the file below Circuit modeling in Verilog.docx

HL-35355357

AC Input Filter Design

I’m looking forward to design a robust AC input filter for HiLink AC DC converter in which an AVR project is running. And I would like to add some prime feature...

HL-35328632

single cycle mips processor with vhdl

Write the equivalent VHDL code, and Verify the correct operation through Vivado Simulator by comparing your simulation results with those of MARS runs.

HL-35350941

Description of the module for receiving / transmitting information on the verilog for the Pmod MAXSONAR

Need to implement Pmod MAXSONAR on Arty A7-35T board

HL-35343797

Implementation of Digital Signature Scheme for FPGA in Vivado Design Suite

I need to implement digital signature algorithm in Xilinx Vivado Design Suite using Verilog. Please find the attachment for complete details of project.

HL-35341451

duo core processor -Java short project

I need someone who is well conversant with java to help me build the microprocessor simulator

HL-35332846

Develop a prototype using FPGA

I want to create programming routines to be recorded on an FPGA

HL-35331508

Implementation

can u please implement this serial bit architecture in parallel so that the no. of rounds could get decreased and can run simulation synthesis and implementatio...

HL-35330951

Simon Cipher parallel implementation

can u please implement this serial bit architecture in parallel so that the no. of rounds could get decreased and can run simulation synthesis and implementatio...

HL-35326812

Vivado software - FPGA Digital Systems -- 2

Project to be done in VHDL, so I am looking for an expert. The objective is to create a testbench for one circuit, and simulate the a few operations including s...

HL-35326785

Vivado software - FPGA Digital Systems -- 2

Project to be done in VHDL, so I am looking for an expert. The objective is to create a testbench for one circuit, and simulate the a few operations including s...

HL-35325162

Implementation of Digital Signature Algorithm in Xilinx Vivado Design Suite -- 2

I need to implement digital signature algorithm in Xilinx Vivado Design Suite using Verilog. Please find the attachment for complete details of project.

HL-35322046

Vivado software - FPGA Digital Systems

Project to be done in VHDL, so I am looking for an expert. The objective is to create a testbench for one circuit, and simulate the a few operations including s...

HL-35321500

servomotor in vhdl

separate project in 3rd part, first make the chdl codes according to the state machine as well as their test ban (Reception and emission), make a top entity etc...

HL-35320869

Microcontroller

Microcontroller is considered as the backbone of Embedded System& it's most important feature is: "It can think". A Microcontroller looks like a simple electron...

HL-35320770

Microcontroller

Microcontroller is considered as the backbone of Embedded System& it's most important feature is: "It can think". A Microcontroller looks like a simple electron...

HL-35320325

Expert on VHDL and FPGA (only expert required)

I am looking to hire an individual who really understand this subject. should be able to solve any problems related to this subject. communicate and be able to...

HL-35314976

proyecto en basys 3 VHDL y vivado / project in basys 3 VHDL and vivado

Corrimiento de dígitos en display 7 segmentos: Este código tiene como objetivo mostrar y correr el número que se vaya escribiendo con el teclado matricial. Cada...

HL-35313389

Expert in logisim

More details will be shared in chat

HL-35303508

Haskell Project

Haskell Project Expert Required

HL-35302471

LOGISIM Help -- 2

My daughter is in college and need help on LOGISIM.. Please advise if anyone can help. Thanks, Rajesh

HL-35298075

design an appropriate power flow control loop around the SSSC to schedule the active power flow in the respective transmission line with appropriate dynamic response characteristics. on PSCAD

TASKS DONE: The student is expected to develop a single machine infinite bus SMIB system on PSCAD and test the response of the system model against well-known p...

HL-35296811

Need a System Verilog Expert for digital logic circuit design

It is IoT based project the name is NIRIKSHAKK

Need a C# and VHDL developer

timing waveforms for vhdl code

Write VHDL code for Vivado

Verilog programming

DSP engineer

Drone navigation and planning algorithm.

Object detection and classification using FPGA

MIPS Expert for Assemple language project

Verilog Coding

BLDC Motor Control

AVR Basic To C

Make an encoder (Mux) 7 segments must be made in 8-bit Microprocessor: Picoblaze

I'm looking for the support for doing my project work

Verilog circuit modelling

AC Input Filter Design

single cycle mips processor with vhdl

Description of the module for receiving / transmitting information on the verilog for the Pmod MAXSONAR

Implementation of Digital Signature Scheme for FPGA in Vivado Design Suite

duo core processor -Java short project

Develop a prototype using FPGA

Implementation

Simon Cipher parallel implementation

Vivado software - FPGA Digital Systems -- 2

Vivado software - FPGA Digital Systems -- 2

Implementation of Digital Signature Algorithm in Xilinx Vivado Design Suite -- 2

Vivado software - FPGA Digital Systems

servomotor in vhdl

Microcontroller

Microcontroller

Expert on VHDL and FPGA (only expert required)

proyecto en basys 3 VHDL y vivado / project in basys 3 VHDL and vivado

Expert in logisim

Haskell Project

LOGISIM Help -- 2

design an appropriate power flow control loop around the SSSC to schedule the active power flow in the respective transmission line with appropriate dynamic response characteristics. on PSCAD

I2C protocol implementation in VHDL

Urgent Small VHDL project , Repost

FPGA, Quartus , VHDL