Verilog / VHDL projects — HireLancer archive

ID / Date Listing

HL-31933140

Modelling and simulation (Verilog)

I have done a Verilog module for clock and data recovery using DLL ( this is for simulation purposes only) I used Modelsim for simulation. In the transmitter (T...

HL-31932268

Microgrid design

I need a professional who are able to simulate the data by using Homer Pro software

HL-31932108

ethereum bit stream

i have fpga bcu/buc 1525 card, vivado lab & miner..so i need just ether bit stream and cors.who any one under stand my project then contact me.

HL-31931031

Xilinx Vivado 2019 expert for signal processing of GPS. C++, VHDL programming.

The project is to implement a GPS / Galileo signal tracking algorithm into the FPGA side of a Zynq 7020. A first algorithm has been already developed and validi...

HL-31930148

FPGA Mining

FPGA Mining fot Xilinx® Alveo™ U30

HL-31929167

assembler simple project

assembler simple project contact for more details

HL-31928258

do some circuit analysis and simulation

it is analog based project required a good knowledge in the cadence or in analog tool that is good

HL-31924285

device expert

I am going to add required with Xilinx and Vivado in A BASYS 3 BOARD

HL-31923951

Computer Architecture( Verilog Coding)

Need an expert who has good knowledge in Verilog coding, computer architecture

HL-31921329

Signal modulation/digital modelling -- 2

Hi, I have a project for data modulation and encoding, I did part of it in digital and I need help in analysis and measruments

HL-31912500

Encoding ,modulation/digital modelling

Hi, I have a project for inductive coupling coils I have all parameters and I would like to inject some crosstalk (jitter in the time domain) in the transmitter...

HL-31904205

Build a LMS adaptive FIR Filter

Implementation of Adaptive Filter for echo cancellation using FPGA and verilog.

HL-31894108

register file design using vhdl

the assignment is to create a register file design using vhdl language. one has to write usig the attached template.

HL-31892282

Cadence AWR Microwave Office software

Create a simple resonant circuit using Cadence AWR; make it parametric and play with the response of the circuit using Tuning Tool and Investigate basic propert...

HL-31887965

snake leader game

use verilog language to make snake and leader game

HL-31887462

Eaton PLC Project

Our customer has a machine controlled by Eaton PLC. Vendor has abandoned the system but the PLC software is installed. Need a PLC programmer experienced with Ea...

HL-31881416

Fpga designing -- 2

Hi I need help for my project on FPGA board for implementation of design using Vhdl. Please contact asap.

HL-31881362

Fpga designing

Hi I need help for my project on FPGA board for implementation of design using Vhdl. Please contact asap.

HL-31880275

PCIe on Xilinx FPGA

Need to develop a system that uses PL based logic to implement PCIe bus for communication with PC

HL-31879215

embedded STM32 microcontroller project

i have a 3 axis machine controlled by stepper motors the stepper motors are controlled by a STM32. i am using the NUCLEO-F746ZG as the board. the embedded contr...

HL-31878337

I need help with Verilog assignment

I just need help with this Verilog assignment asap

HL-31865265

I need a coder

I am doing a coding project to get into a program to become a coder using bluej and need help!

HL-31862710

Vhdl module integration

The aim of this project is to integrate new vhdl code to vivado project and add new module to the hardware

HL-31852781

Creating a bus system in verilog

The bus system will allow four of the registers to receive values from the input switches, and to send values to four of the registers. (One of the registers is...

HL-31852496

a simple verilog project

a very simple verilog project call me for the details

HL-31846718

verilog code

Looking for some help with my verilog code project .. please help if you can ..

HL-31843213

VHDL, Quartus, Modelsim (Simple add-sub unit with register file), 3 port ram

FGPA VHDL add-sub unit with register file 3 port ram edit given circuit

HL-31836214

Simulating LC-3 Machine on SystemVerilog

LC-3 simulation not functioning, all inputs on to a FPGA board is returning 0s. Finished with 90% of the code, needs help with running and debugging

HL-31815028

Computer Organization

MUST BE DONE USING QUARTUS PRIME lite and MODELSIM VHDL CODES USING QUARTUS PRIME lite . MODELSIM TO CREATE WAVES.

HL-31807016

Add-sub unit with register file (3-ported RAM)

3 ported register file using LPM 32 bit registers using LPM design add/sub unit usign LPM (add required flags) MIPS R-type use vhdl code to describe add/sub uni...

HL-31806725

Quartus, FPGA technology, VHDL, ModelSim, 3-ported RAM, LPM, MIF file, MIPS R-type instruction

modelsim is must Add-Sub unit with Register file (3-ported RAM) 3-ported register file, 32 bit registers, add/sub unit.

HL-31803788

Quartus, FPGA technology, VHDL, adder/subtracter. modelsim

n=32 bit adder memory block integrate

HL-31803672

Quartus, modelsim, Memory module, memory blocks, FPGA technology, VHDL, vhd

n bit adder. waveform in modelsim for N=32 mif file, This is an integration Take Adder/Subtractor Memory Block Labs LPM 3 PORT RAM FOR N=32 bits

HL-31800212

Modeling timing uncetanity in communication

Hi, I have a project for data modulation and encoding, I did part of it in digital and I need help in analysis and measruments of the timing uncertanity

HL-31796435

silvaco software expert

i want long term employee. if you are expert in silvaco too, please bid here. need to start the project right now

HL-31793742

Simple Processor VHDL Code

Complete the skeleton code of this simple processor. Language must be VHDL and not Verilog. The attached file provides an outline of what must be completed.

HL-31791757

Verilog Project -- 2

Fairly simple Verilog Project. I will send you all of the information about the project in a zip file.

HL-31790869

Signal modulation/digital modelling

Hi, I have a project for data modulation and encoding, I did part of it in digital and I need help in analysis and measruments

HL-31787205

Eclypse z7 FPGA programmer

VHDL programmer: for programming Eclypse z7

HL-31783833

ReconOS expert(ONLY!!!!) needed

Dear reader, If you are an FPGA SoC expert with at least five years of experience in C, scripting, kernel programming, RTOS, FPGA, SOC, and Softcore processors,...