variable size matrix multiplication VHDL Vivado
Budget: £20 – £250 GBP
the task is to develop and implement on synthesizable matrix multiplier kernels
the simulation result compare with the result of matlab , the test platform read the input buffer of matrix A and B, then generating the output C. If the result is 100% compared with the result of matlab, the data in output file" OutputC .txt" should all appear true, otherwise , the result is false
the simulation result compare with the result of matlab , the test platform read the input buffer of matrix A and B, then generating the output C. If the result is 100% compared with the result of matlab, the data in output file" OutputC .txt" should all appear true, otherwise , the result is false