Conversion of C Project into Verilog for FPGA Implementation

Job ID: 33858018

Budget: $150 – $250 USD

I need to implement an Ed25519 Algorithm in Verilog for FPGA implementation that can properly simulate on Xilinx Vivado Design Suite. The complete algorithm code is already available in C language and I want to convert it into Verilog.
Link: https://github.com/orlp/ed25519

Related categories: C Programming Verilog / VHDL C++ Programming FPGA