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DDR3 (PCIe, board design/fpga)

Matlab and MathematicaVerilog / VHDLFPGADDR3 (PCIe, board design/fpga) Place Bid

We are looking for a Matlab & simulink expert for modelling FPGA in Xilinx vivado. The project will be a part of training on simulink for 8 hours.

Full Description of Model based FPGA design in matlab

Fpga_pcie_driver_plus

LinuxFPGAEmbedded SystemsYoctoDDR3 (PCIe, board design/fpga) Place Bid

Please Read the attached document before biding. This project requires an Embedded Programmer having extensive experience in YOCTO, Driver Programming for FPGA cards, PCIe Interface as well as the Kernel of the Linux OS. Familiarity with RISC-V architecture is a plus.

Full Description of FPGA_PCIe_Driver_Plus

Fpga_pcie_driver_xdma

Sales & MarketingEmbedded SoftwareFPGAYoctoDDR3 (PCIe, board design/fpga) Place Bid

Full Description of FPGA_PCIe_Driver_xDMA

Pcie On Xilinx Fpga

ElectronicsVerilog / VHDLMicrocontrollerFPGADDR3 (PCIe, board design/fpga) Place Bid

Need to develop a system that uses PL based logic to implement PCIe bus for communication with PC

Full Description of PCIe on Xilinx FPGA

I Need A Programmer For Texasinstrument's Ic

DDR3 (PCIe, board design/fpga) Place Bid

For controller of our product. Hardware is designed, only required program

Full Description of I need a programmer for texasinstrument's ic

Create A Native C Code For Crypto And Then Port To Xilinx

Sales & MarketingVerilog / VHDLC++ ProgrammingFPGA CodingDDR3 (PCIe, board design/fpga) Place Bid

We need to port to native c++ a KDA algo that is blake2s and verify that works (so that create nounce from work) and then port this to HSL verilog (xilinx) The code can be taken from CryptoPP or from this link: https://github.com/weidai11/cryptopp/blob/master/blake2s_simd.cpp Taken from this library: https://github.com/weidai11/cryptopp Once the code is verified in C we need to test to see if we can generate nounce and confirmation and if possible optimize it

Full Description of Create a native c code for crypto and…

Altium Pcb Layout For Xilinx Zynq With Ddr Ram Project

PCB LayoutPCB Design and LayoutDDR3 (PCIe, board design/fpga)Altium Designer Place Bid

I am updating the design of a FPGA board and would like to out source the layout phase. The board consists of the following key components: • FPGA - Xilinx zynq 400 ball device • RAM DDR3 • Ethernet • I2C 8 I2C slaves on two I2C ports • SPI interfaces to 4 SPI interfaces The design requires a flexi rigid PCB and I anticipate that the FPGA section will require 6 layers though the time critical nets will need…

Full Description of Altium PCB Layout for Xilinx Zynq with DDR…

Sad Hard Drive Error

LinuxMicrocontrollerGitDDR3 (PCIe, board design/fpga) Place Bid

I got 512G ssd hard drive that won’t be recognized. The crash happened during file transfer to another drive. I got a ubuntu 20.04 with Gparted to work with. If this is an issue with the controller, maybe I should give up recovering the data, or I will pay whoever is able to at least recover the data and for me to be able to format. my budget: usd 15

Full Description of sad hard drive error

Counts Of Hardware-related Activities

FPGAApplication Performance MonitoringHardware Security ModuleDDR3 (PCIe, board design/fpga)PLC Place Bid

I need to understand how to use the special-purpose registers which are built into the modern microprocessors to store the counts of hardware-related activities within computer systems and learn at least one tool to collect this data

Full Description of counts of hardware-related activities

Programming Of Actel Fpga A40mx04

Sales & MarketingElectronicsMicrocontrollerFPGADDR3 (PCIe, board design/fpga) Place Bid

We have one working FPGA and we need to copy the date of working FPGA to New same FPGA.

Full Description of Programming of Actel FPGA A40MX04

Ethernet Rtl(verilog) Tutor

Verilog / VHDLSemiconductorFPGA CodingDDR3 (PCIe, board design/fpga)Digital ASIC Coding Place Bid

Explain and help understand Ethernet MAC/PHY RTL from github. https://github.com/alexforencich/verilog-ethernet Required: - Industry experience in digital/mixed-analog IP RTL design, preferably Ethernet IP. Meetings will be conducted via zoom/meets. Thank you!

Full Description of Ethernet RTL(Verilog) Tutor

Setting Up A Bunch Of Device Using Ibm Watson Iot Platform

Embedded SoftwareInternet of Things (IoT)Embedded SystemsHardware Security ModuleDDR3 (PCIe, board design/fpga) Place Bid

SO I have a hardware project currently in the development and testing phase. So to manage that hardware I need a PLatform super easy to use and implement. Watson IoT seems to be a good platform for my need. Like to know if somebody can give me a clearer picture of it and suggest different products as well.

Full Description of Setting up a bunch of device using IBM…

Fpga Programming - Create A Specific Algorithm

Sales & MarketingC++ ProgrammingFPGAFPGA CodingDDR3 (PCIe, board design/fpga) Place Bid

Hello, I'm hiring a dev who's very hot with FGPA. Need him to create cryptocurrency miner/blockchain. Specificly Xilinx Alveo U200 & U250 Cards. I can pay a lot. Contact me I'm very active. #FPGA - #XILINX #ALVEO #ALVEOu200 #ALVEOu250 #XRT #MINING #CRYPTO #DEVELOPPER #FREELANCER #FREELANCE

Full Description of FPGA PROGRAMMING - Create A Specific Algorithm

Accelerate A Python Code And Convert To Python Overlay On Zynq Fpga Developmenmt Board

PythonFPGAFPGA CodingDDR3 (PCIe, board design/fpga) Place Bid

Accelerate a python code and Convert to Python Overlay on Zynq FPGA developmenmt board

Full Description of Accelerate a python code and Convert to Python…

Edit And Create Cover Page For Social Media Advertising.

Internet MarketingVideo EditingDDR3 (PCIe, board design/fpga) Place Bid

To edit and create cover page for social media advertising

Full Description of Edit and create cover page for social media…