FPGA Expert Needed
An expert with FPGA is needed. The expert must be proficient with Quartus Prime.
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System Verilog Project -- 2
Hi, I am looking to optimize my current system verilog code. Please let me know if you have experience implementing optimization techniques in System Verilog.
Read moreLooking for Verilog Freelancer
Looking for help on an adder project in verilog
Read moreConvert Xilinx Project to a Different Xilinx FPGA
I have a Xilinx FPGA project and I would like to update it to use a newer Xilinx FPGA.
Read moreFPGA based miner design
I'm going to build the miner with FPGAs, not using ASIC. Please submit proposal only with experience in designing similar things.
Read moreVerilog Project in MODELSIM
Modul de inmultire, folosind sumator si registrii de deplasare
Read moreVerilog Project
I have a project about implementing a Datapath and a Controller FSM for Fibonacci Series Calculator on Quartus and Modelsim.
Read moreFpga AMS-gpx2
We are using Xillinx fpga developing a lidar control system, involving an AMS-gpx2 TDC chip and a dual axis scanner which need two independent sine wave (DAC+cl...
Read moreSystemVerilog synthesizable Code
Need someone to Recheck my Verilog Code for PipelineDesign
Read moreMiner for fpga xilinx alveo u200
I need a developer who can build a miner for sha256d algo (including bitstream) for u200 fpga’s FPGA’s are located in aws data center, We could give you a ssh o...
Read moredeisgn and verification of Dynamic/adaptive Huffman code,vitter algorithm using verilog
I am looking to hire someone to go through the vitter algorithm of the dynamic huffman coding and implement the encoder(compulsory) and decoder(optional) . I am...
Read moreArabic and English, offline speech recognition mcu
hi I need a cheap solution for offline speech recognition mcu , that can support Arabic and English lang, to add some commands to on ,off some outputs. note: th...
Read more2 system Bus arbiter in Verilog using synchronizer for clock domai crossing
More details will be shared later.
Read moreModify the Code of Simple SPI Master in Verilog
I have written the code for a simle SPI Master in verilog and also included a testbench. I want you to: 1) Add a Clock Divider to it, so that the output SPI fre...
Read moreFpga Development
I am looking for a fpga developer for a crypto mining project. More details will come soon
Read moreVERILOG RTL CODE for Interface arbiter
2 interface accessing the arbiter through clock crossing using a config register. More details will be shared later.
Read moreNose JS c++ fpga raspberry pi
We have a client project in Node.JS and C++ Do you have experience with Raspberry Pi and Booting Kernels? Please respond with your experience. Have you worked w...
Read moreBuild a miner for xilinx alveo u200
I need a developer who can build a miner for sha256d algo (including bitstream) for u200 fpga’s FPGA’s are located in aws data center, We could give you a ssh o...
Read moreNeed help with VHDL
Need help to code for a hamming coder. Please let me know if you can do it.
Read moreElectronics schematics design verification and testing FPGA
Hi, I would like to hire a person for my project from china preferably (since the main purpose is to verify the design, get it manufactured, and then bring-up t...
Read moreCADENCE VIRTUOSO making circuit from verilog-a
i have a code for tfet using verilog-a,i need to get a circuit from verilog-a in cadence virtuoso and design digital circuit,half adder and ring oscilator
Read moreI need verilog coding by moore or mealy for the question below
Design, simulate and verify a synchronous digital system that detects and recognizes your student ID as password that can be used to generate an output signal....
Read moresimulación Xilinx ISE
Simulación de dft y fft en xilinx y documentación del paso a paso .
Read moreExpert in python and Verilog/VHDL needed
I need someone expert in python and Verilog/VHDL
Read moreFPGA Image processing -- 3
hi i want to create one image processing code for attached images . final image has different. This small dot can be any where in this white line . can you do t...
Read moreI need help -- 2
Hi, I need help with, Single cycle data-path design of CPU with assembly code in Verilog.
Read moreMicroprocessor and Interfacing Project
I want someone to help me build a project relating to Microprocessor and Interfacing.
Read moreProject in Quartus -- 2
All the details about the project in the picture
Read moreFPGA acceleration for mapping Deep Neural Network -- 2
I am looking for an expert to work on a project in FPGA acceleration for mapping Deep neural network with skills in High level synthesis, PYNQ image, and Ultras...
Read moreMachine learning (network) by using FPGA
My project is the implementation of machine learning by using FPGA. We will have already trained network and we will improve the deep neural network like speed...
Read moreFPGA Developer Required
We are looking for a very experienced developer to do this FPGA task inside the document file for us !!!! The maximum budget is: 70 AUD timeline : 3 days and sh...
Read moreFPGA acceleration for mapping Deep Neural Network
I am looking for an expert to work on a project in FPGA acceleration for mapping Deep neural network with skills in High level synthesis, PYNQ image, and Ultras...
Read moreNeed an expert in VHDL with processor logic design
Need an expert in VHDL with Microprogrammed control unit and hardwired control unit design for a 1 bit processor
Read moreI need someone with good knowledge of CPU Pipelining with Cache Memory (D-Cachec and I-Cache).
I have a in-order processor design (with all the stages like Fetch, Decode, ALU, etc..) and a snippet of code which contains order of instructions (load, add......
Read moreI need someone with a good knoweldge of CPU and Cache design.
I have a snippet of code instructions and in-code processor design, for which I have to draw a chronogram of first two iterattions of the loop. The task should...
Read moreVerilog expert needed today
Message me for more info about the project.
Read moreHardware implementation of Neural network
Need to implement neural network testing on verilog. Need verilog coding. Training and testing done in matlab. And then testing part again done in verilog. And...
Read moreI need a VERILOG EXPERT
Verilog needed for this project. A developer to work quick
Read moreทำเครื่องคิดเลข ใช้ verilog, basys3
ขอภายใน 1 วัน? https://docs.google.com/document/d/e/2PACX-1vR-5MzdWccs4iCyi8OEAKwo8JxCRpaBjkO8c_bAMV4Cux8T9p-ZIaCn26CYwyubyEKkYue07fn1o8OL/pub?fbclid=IwAR0KQHwR...
Read moreVerilog expert needed on 12/17
Need help with a few questions. Message me for info
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