FPGA projects — HireLancer archive

ID / Date Listing

Quartus Altera/INTEL

Looking for a tutor on Quartus Altera/Intel MAX10 FPGA device. Knowledge of QSYS, Platform designer, Eclipse, HDL/VHDL. Embedded system control design using FPG...

HL-31375065

verilog engineer

in this project designing of a particular pulse block width and a designing of gate array

HL-31359228

Build an FPGA electronic board for certain device.

We are a leading company manufacturing cnc machines and for a particular new product we require expertise in FPGA technology. Offline and online model will be r...

HL-31358465

Vivado Tutor

Hopefully this time I am succesful. I am searching for someone to teach me some fundamentals in Vivado. I have written some HLS kernels that I can compile throu...

HL-31356275

FPGA_PCIe_Driver_Plus

Please Read the attached document before biding. This project requires an Embedded Programmer having extensive experience in YOCTO, Driver Programming for FPGA...

HL-31349215

FPGAs security design

I would like to contact some one expert with FPGAs and control flow integrity

HL-31330364

VHDL project

I need small help in VHDL project

HL-31313392

Expert on Verilog

Expert on Verilog with proficiency in Xilinx Vivado software

HL-31300981

fpga programmer

program the code in the fpga as given by me

HL-31285281

Ethernet protocol on two zybo board

The data transfer between two zybo board via ethernet protocol, when data received the LED should glow for indication purpose.

HL-31280982

FPGA bitstream for kawpow algorithm

I need someone who can write a bitstream optimized for bcu1525 (vcu1525). As well as the pc miner.exe file locked by DNA. It should be a file that can be entere...

HL-31278420

walkerror correction module in VHDL

The project aim to create a module for walk error in TOF lidar receiver, It receive the data from receiver and then add the offset to distance value and then us...

HL-31265676

Design of the NTT Multiplier -- 2

I need the expert in verilog to design the Number theoretic transform (NTT) multiplier.

HL-31265632

Design of the NTT Multiplier

I need the expert in verilog to design the Number theoretic transform (NTT) multiplier.

HL-31265678

Design of the NTT Multiplier -- 3

I need the expert in verilog to design the Number theoretic transform (NTT) multiplier.

HL-31234048

Code For Me

All i need in this project is Block diagram for the adder and multiplier , State diagram for the FSM , Code added as appendix with detailed description for each...

HL-31223897

Arduino code translated to Verilog does not work. Debug required

Hi, I have an Arduino code which takes the input from an accelerometer and perform some operations to move a motor. I translated that Arduino code into Verilog....

HL-31203831

implement a Multiplier Accumulator Circuit Using VHDL

You are required to implement a Multiplier Accumulator Circuit (MAC). This circuit takes two sets of 10 inputs; each input is 8 bits long. The circuit multiplie...

HL-31198810

1553 on fpga

I am looking for someone who can implement 1553 . All he need is software implementation of 1553 on fpga and have to varify pcb design.

HL-31190962

VHDL SD card implementation

Hello, In my project I need to store data on my FPGA Altera EVMs. The data must be stored on a non-volatile device (power done can occur at all time). To do tha...

HL-31180631

Xilinx FPGA Camera Pipeline -- 2

Create a time-synchronized stereo pair of cameras with four virtual devices. Each camera should support 4K @ 60 FPS and 1080P @ 240 FPS using the Jetson ISP and...

HL-31180243

Xilinx FPGA Camera Pipeline

Create a time-synchronized stereo pair of cameras with four virtual devices. Each camera should support 4K @ 60 FPS and 1080P @ 240 FPS using the Jetson ISP and...

HL-31179941

Verilog UDP/TCP Image Tranfer

I need to transfer image over udp/tcp protocol with fpga. So I need someone know verilog and made project using UDP/TCP.

HL-31179894

MT9J003 Camera Sensor

I need someone who take data from MT9J003 Camera sensor with verilog.

HL-31170524

FPGA data capture

Want to see real time FPGA data in matlab using FPGA data capture with VHDL code.

HL-31165848

verilog, FSM -- 3

I need long term employee. if you are expert in solving FSM problems, please bid here

HL-31160603

verilog, FSM -- 2

I need long term employee. if you are expert in solving FSM problems, please bid here

HL-31160189

verilog, FSM

I need long term employee. if you are expert in solving FSM problems, please bid here

HL-31158574

1553 databus interface

I am looking for someone who can design and develop mil std 1553 bus protocol for me ( for my gas line sensor interface project ). i already worked on 1553 but...

HL-31156130

FPGA (Prefer Verilog) - Get Data from SPI and send back response

Get the data via SPI port and encrypt the raw data with AES128 then feedback to user via SPI port as well

HL-31151293

Xilinx FPGA Computational Storage Project -- 3

For this project, we are looking for an RTL developer to assist in developing a technology Proof of Concept for a simplified FPGA-based system to store data in...

HL-31144455

Verilog Code

Create a Verilog Code on GOWIN FPGA (SPI SLAVE）

HL-31142431

Walk error module

The project needs the module of walk error for TOF sensor. The module should be design in vhdl

HL-31118761

Need Help in understanding an accelerator RTL code

I have an accelerator RTL I need help in understanding with and adding comments and finding potential bugs.

HL-31114747

FPGA/VHDL Task

Title: Design and Implementation of an ’16-bit Reduced Instruction Set computer (RISC) system for Robot Applications’ Design Problem specification: To design an...

HL-31113389

Verilog and Vivado Tutor -- 2

I am currently working on a project to combine a custom kernel with an AI accelerator (DPU) from Xilinx. Currently I am facing some issues with integration and...

HL-31111804

Need a VHDL Expert

Title: Design and Implementation of an ’16-bit Reduced Instruction Set computer (RISC) system for Robot Applications’ Design Problem specification: To design an...

HL-31100800

Verilog and Vivado Tutor

I am currently working on a project to combine a custom kernel with an AI accelerator (DPU) from Xilinx. Currently I am facing some issues with integration and...

HL-31038369

from C++ to openCL

Need to convert some specific loops in a C++ code to OPENCL for execution on FPGA

HL-31036358

Model based FPGA design in matlab

We are looking for a Matlab & simulink expert for modelling FPGA in Xilinx vivado. The project will be a part of training on simulink for 8 hours.