Need a C# and VHDL developer
The budget is $50. You will wire down a vhdl in Vivado to display 4 digit intiger on a display of basys3 board. The data will be arrived with a UART port. You c...
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timing waveforms for vhdl code
I have vhdl code. i need timing waveform from modelsim .
Read moreWrite VHDL code for Vivado
I have a file in VHDL that I want to rewrite. The file uses "process" but we want to rewrite it using components. We have some of the modules you could use alre...
Read moreVerilog programming
Multicycle Processor Controller
Read moreVerilog Coding
We need to program a FPGA board using verilog code with XNOR, Multiply, shiftleft and add modules that can run on the board using different switches. When we co...
Read moreI'm looking for the support for doing my project work
Hi, I would like to know the best rate for doing one of project work. attched details for the project requirement.
Read moreDescription of the module for receiving / transmitting information on the verilog for the Pmod MAXSONAR
Need to implement Pmod MAXSONAR on Arty A7-35T board
Read moreImplementation of Digital Signature Scheme for FPGA in Vivado Design Suite
I need to implement digital signature algorithm in Xilinx Vivado Design Suite using Verilog. Please find the attachment for complete details of project.
Read moreDevelop a prototype using FPGA
I want to create programming routines to be recorded on an FPGA
Read moreVivado software - FPGA Digital Systems -- 2
Project to be done in VHDL, so I am looking for an expert. The objective is to create a testbench for one circuit, and simulate the a few operations including s...
Read moreVivado software - FPGA Digital Systems -- 2
Project to be done in VHDL, so I am looking for an expert. The objective is to create a testbench for one circuit, and simulate the a few operations including s...
Read moreImplementation of Digital Signature Algorithm in Xilinx Vivado Design Suite -- 2
I need to implement digital signature algorithm in Xilinx Vivado Design Suite using Verilog. Please find the attachment for complete details of project.
Read moreVivado software - FPGA Digital Systems
Project to be done in VHDL, so I am looking for an expert. The objective is to create a testbench for one circuit, and simulate the a few operations including s...
Read moreservomotor in vhdl
separate project in 3rd part, first make the chdl codes according to the state machine as well as their test ban (Reception and emission), make a top entity etc...
Read moreExpert on VHDL and FPGA (only expert required)
I am looking to hire an individual who really understand this subject. should be able to solve any problems related to this subject. communicate and be able to...
Read moreI2C protocol implementation in VHDL
I want to use accelerometer sensor on FPGA, in order to do that I need I2C protocol implementation in VHDL so I can continue my work on the project. I want the...
Read moreUrgent Small VHDL project , Repost
Hi there Urgently need small VHDL project to be done. Please apply ASAP if you can start it immediately after hiring Thanks
Read moreFPGA, Quartus , VHDL
Using the fixed point arithmetic measure current according to the following circuit
Read moreUrgent Small VHDL project
Hi there Urgently need small VHDL project to be done. Please apply ASAP if you can start it immediately after hiring Thanks
Read moreImplementation of Digital Signature Algorithm in Xilinx Vivado Design Suite
I need to implement digital signature algorithm in Xilinx Vivado Design Suite using Verilog. Please find the attachment for complete details of project.
Read moreVHDL Develop Project
Create a VHDL routine to water a plant using state machines and a specific board
Read moreFPGA PROJECT- DIGITAL CLOCK on ARTIX 7 Nexys 4 board
The main objective of the digital clock is to display the time digitally using 7-segment display on Artix-7 FPGA Board. The digital clock by default displays th...
Read moreFPGA designer in VHDL, DO-254 project
Good knowledge of VHDL is required. Libero Soc and Microsemi will be used The simulator will be Aldec Active-HDL, linting with Aldec Alint Design of a basic con...
Read moreSignal processing Using ML algorithm with (ZedBoard, VHDL, C and vivado)
1- Signal processing using ML on a computer (C Language) 2- using Single and dual ARM (C Language) 3-using FPGA Zedboard programmable logic (VHDL Language)
Read moreVerilog Coding
My project includes working on a verilog code for a stair case encoder. Below is the image of the architecture of the encoder and for each seperate block, i nee...
Read moreVerilog Vivado Software Basys3 Board
Verilog Vivado Software Basys3 Board
Read moreVerilog Code Vivado Software Basys3 Board -- 2
Verilog Code Vivado Software Basys3 Board
Read moreVerilog Code Vivado Software Basys3 Board
Verilog Code Vivado Software Basys3 Board
Read moreTic Tac Toe using verilog
I'm trying to solve 5*5 grid tic tac toe game using Verilog, i need help in developing the tic tac toe game for 5*5 grid
Read morec, vhdl expert needed -- 2
i want code and report. I need plagiarism free report. software is quatrus
Read morec, vhdl expert needed
i want code and report. I need plagiarism free report. software is quatrus
Read moreSystem Verilog code help
Hi developers. I am looking for quick help for System Verilog code help. Please apply if you are expert in Verilog. Thanks.
Read moreASIC Accelerator
Looking for a person who can code in system verilog.
Read moreLocal parallel operation speed up issue !
i'm looking for digital electric engineer for my product. let's discusse over chatting about that.
Read moreWriting research review Papers -- 2
FPGA in Distributed optical fiber sensor
Read moreDesign a First-In-First-Out (FIFO) buffer that can store up to 8 data words using VHDL.
Besides the system consisting of the data buffer, you should also design a test bench to simulate the three external systems.
Read moreImproving upon a VHDL project
A VHDL project about producing Moors code and converting it to ASCI code needs to be improved since it does not produce correct results.
Read moreImproving upon a VHDL project
A VHDL project about producing Moors code and converting it to ASCI code needs to be improved since it does not produce correct results.
Read moreverilog fpga programming in linux
Verilog FPGA programming in Linux
Read morePCB design including FPGA / ASIC (4K Video products)
We have excellent software design capability in house. We also have 20 years experience in product design. But no pcb design experience. Our current products ar...
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