Need Help With Assembly

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1.
Say we have a 256 bit adder.
Using subword parallelism, how
many addition operations of varying lengths can we perform? (Look in the
slides).
Then describe in your own words what subword parallelism is.

2.
Describe the effect that a single stuck-at-0 fault (i.e., regardless
of what it should be, the signal is always 0) would have for each of the
following signals, in the single cycle datapath covered in class.
Which
instructions (considering only those that can be executed by this datapath),
if any, will not work correctly? Explain why.
Consider each of the following
faults separately:
i.
MemtoReg = 0
ii.
MemRead = 0
iii.
MemWrite = 0
iv.
Brach = 0
v.
RegDst = 0

3.
Make a drawing that shows the clock cycle at which each of the
instructions in the sequence given below would be completed, assuming
the 5-stage MIPS pipeline without forwarding discussed in class, and
numbering the clock cycle at which the first of the instructions is fetched
as clock cycle 1.
Assume that if one instruction reads a register during
the same clock cycle as another instruction is writing it, the new value
will be read.
Do not reorder the instructions.
Instructions are fetched
1
and executed exactly in the order given below, with the pipeline stalling if
necessary.
addi $s2, $s2, 1
li $s6, 5
add $s1, $s2, $s3
move $s5, $s6
lw $t1, 0($s5)

4.
Repeat the above question, but now assume that the pipeline
does use forwarding.
Provide a drawing.
Assemblyx86/x64 AssemblerARM

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