HW digital system design

Job ID: 35040791

Budget: $10 – $30 USD

Implement a 4-bit full adder using four instances of a 1-bit full adder using both ModelSim and Quartus Prime. Design a 2-to-1 multiplexer using Gate level modeling, and write a test bench for it using ModelSim. Implement a 4-to-16 decoder using 2-to-4 decoders, and write a test bench for it using ModelSim.

Related categories: Engineering Electronics Verilog / VHDL Electrical Engineering FPGA