Xilinx FPGA Projct -- 3

Job ID: 32920085

Budget: $3,000 – $5,000 USD

The Project is to develop Verilog code to control DDR4 DRAMs via a Memory Controller and I2C interface using a Xilinx Zync+ UltraScale FPGA.

Related categories: Verilog / VHDL Microcontroller LabVIEW FPGA Computer Science