Vhdl fpga alarm clock nexys4 ddr

Job ID: 32045952

Budget: $30 – $50 USD

I want to build alarm clock using vhdl in nexys4 ddr fpga board. Display clock in 7 segment display. Modify hour and minutes and set alarm and if possible set stopwatch. Not verilog. Using vhdl.

Related categories: Verilog / VHDL Electrical Engineering FPGA