Verilog with cadence

I have a small task about differential amplifier... I need to implement a verilog-A code with assuming values of parameters ... with that code I have to get a symbol. From that I need to find some ac and DC and trans parameters I e., Offset , slew rate , rise time , fall time , 3dB, open loop gain etc., so what ever you are finding it should be initialize in code and we have to show on output side with same values in cadence environment.