VLSI Design : Verilog code for the Graph Convolutional Neural Networks (GCNs) module
Budget: $10 – $30 USD
ASIC Acceleration for Graph Convolutional Neural Networks (GCNs)
The task is to write a verilog code use that instantiates the GCN module. This verilog code check the correctness of the module with behavioral, post-synthesis, and post-Innovus Verilog netlists.
Rest of the documents will be provided in the chat.
The task is to write a verilog code use that instantiates the GCN module. This verilog code check the correctness of the module with behavioral, post-synthesis, and post-Innovus Verilog netlists.
Rest of the documents will be provided in the chat.