VHDL for using Vivado for a basys3 artix-7 FPGA

Job ID: 31629283

Budget: $10 – $30 USD

Write code and program the Basys3 board to operate as described below.
I/O:
Use four switches to represent a 4-bit number. Use two more switches as "invert" and "reverse".
The output is to be shown on the seven segment display.
Operation:
The value of the 4-bit number is to be shown on the seven-segment
display. The value of the number is to be interpreted as follows.
If Invert is high then the bits are to be inverted. For example,
0110 would normally be shown as 6. But if the invert is high
then it should be seen as 1001 or 9.
If Reverse is high then the order of the bits is to be reversed.
For example, if the switches are 1100 it would normally be shown
as C. But if the reverse is high, then this number should be
read as 0011 and 3 be displayed instead.
If both Invert and Reverse are high do both operations.
Example:
Invert/Reverse Mode Example
0 - 0 Normal "0111" → 7
1 - 0 Inverted "0111" → 1000 or 8
0 - 1 Reversed "0111" → 1110 or E
1 - 1 Inverted & Reversed "0111" → 0001 or 1
Use with/select and when/else for the conditional statements.
Related categories: Windows Desktop Verilog / VHDL FPGA FPGA Coding