VHDL Coding Assistance

I am seeking an experienced VHDL programmer to assist in the development of a digital circuit design for FPGA implementation. The project involves creating VHDL modules for a state machine-based system designed to generate and store Fibonacci numbers in RAM. The key components of this project include:

Main FSM Controller: Develop a Finite State Machine (FSM) to manage the generation and storage of Fibonacci numbers, handling state transitions based on external inputs.

Debouncer: Implement a debouncer module to stabilize the input signals from physical buttons, ensuring clean transitions and preventing bounce-related issues.

Counter: Create a counter module that will provide address generation for the RAM, managing the read/write operations based on the FSM's state.

RAM Module: Design a single-port RAM with synchronous write and asynchronous read capability, using VHDL to handle data storage and retrieval operations efficiently.

Project Requirements:

Strong expertise in VHDL and experience with FPGA programming.
Ability to write clean, maintainable, and robust VHDL code.
Experience with Xilinx Vivado or similar FPGA development environments.
Good understanding of digital design, specifically with state machines and memory management.
Ability to test and validate VHDL code using simulation software before FPGA implementation.
Deliverables:

Complete VHDL source files for all described modules.
A testbench for each module to verify its functionality independently.
Integration testing report showing the modules working together as expected.
Documentation detailing the design, code comments, and testing procedures.