Urgent Image Processor Design in Verilog

Job ID: 38208874

Budget: ₹1,500 – ₹12,500 INR

I'm seeking a competent Verilog/VHDL developer to create an image processor for scientific imaging. The primary focus of the processor is noise removal, specifically salt and pepper noise.

Key Requirements:
- Noise Removal: The processor must effectively remove salt and pepper noise from the input images. This is crucial for the intended application in scientific imaging.
- Real-time Processing: The design should ideally support real-time processing for seamless image enhancement.
- Deadline: This is an urgent project with a tight 2-3 day deadline. Punctuality is paramount.

Ideal Skills and Experience:
- Proficiency in Verilog/VHDL: Extensive experience in Verilog/VHDL development is necessary to tackle this project effectively.
- Image Processing Background: Prior experience in image processing and removal of noise, particularly salt and pepper, will be a great advantage.
- Time Management: Given the project's tight deadline, the ability to manage time efficiently and deliver high-quality results promptly is a must.

If you're confident in your Verilog/VHDL skills and have experience in image processing, especially noise removal, I'd be eager to discuss the project further.