I2C Protocol Verilog Enhancement
Budget: ₹600 – ₹1,500 INR
I need a Verilog/FPGA engineer to enhance and debug my existing I2C wrapper module. Currently, it only supports write operations using a state machine for register addressing and data writing.
Key Requirements:
- Extend to support both read and write operations
- Implement error handling for NACK
- High-level optimization of the state machine for performance and reliability
- Thorough documentation and comprehensive test cases
Ideal Skills & Experience:
- Proficient in Verilog/VHDL
- Experience with I2C protocol
- Strong debugging and optimization skills
- Good documentation practices
Deliverables:
- Fully functional and tested I2C wrapper module
- Documentation of changes and usage instructions
- Testbench for verification
Key Requirements:
- Extend to support both read and write operations
- Implement error handling for NACK
- High-level optimization of the state machine for performance and reliability
- Thorough documentation and comprehensive test cases
Ideal Skills & Experience:
- Proficient in Verilog/VHDL
- Experience with I2C protocol
- Strong debugging and optimization skills
- Good documentation practices
Deliverables:
- Fully functional and tested I2C wrapper module
- Documentation of changes and usage instructions
- Testbench for verification