Multiplier Accumulator Circuit using VHDL
Budget: $20 – $30 USD
The circuit must follow the below specifications:
Adder must be implemented using carry look ahead architecture
Multiplier must be implemented from scratch from a hardware point of view
Carefully choose the size for the adder and the registers used in the circuit and show
how did you estimate the size
To be delivered:
1. Report:
Block diagram for the adder and multiplier
State diagram for the FSM
Code added as appendix with detailed description for each part
2. Codes:
All VHDL files used
Test bench code
The submitted codes must be adjusted to be ready for run – If there is any syntax
errors or undefined outputs or missing codes the project will be considered as
non-operating
Adder must be implemented using carry look ahead architecture
Multiplier must be implemented from scratch from a hardware point of view
Carefully choose the size for the adder and the registers used in the circuit and show
how did you estimate the size
To be delivered:
1. Report:
Block diagram for the adder and multiplier
State diagram for the FSM
Code added as appendix with detailed description for each part
2. Codes:
All VHDL files used
Test bench code
The submitted codes must be adjusted to be ready for run – If there is any syntax
errors or undefined outputs or missing codes the project will be considered as
non-operating