Image Processing C++ to Verilog Conversion
Budget: $30 – $250 USD
I am seeking an experienced developer to convert my current image processing project, coded in C++, into Verilog and run on FPGA device using HLS Vitis. The existing project has:
- Edge detection capabilities
- Image segmentation capabilities
The primary goal of this project is not to enhance or alter the images, but to convert the existing codebase from C++ to Verilog, utilizing HLS Vitis. With your expertise:
- Maintain the integrity of the current functionalities during conversion
- Reframe the C++ code to Verilog language ensuring a seamless running on an FPGA device.
The successful bidder should have significant experience with Verilog, C++, and HLS Vitis, as well as a good understanding of Image Processing algorithms, especially Edge Detection and Image Segmentation.
The final output of the conversion should result in an image file product. The deliverable will be the Verilog source code and a functioning image processing project that produces image files.
- Edge detection capabilities
- Image segmentation capabilities
The primary goal of this project is not to enhance or alter the images, but to convert the existing codebase from C++ to Verilog, utilizing HLS Vitis. With your expertise:
- Maintain the integrity of the current functionalities during conversion
- Reframe the C++ code to Verilog language ensuring a seamless running on an FPGA device.
The successful bidder should have significant experience with Verilog, C++, and HLS Vitis, as well as a good understanding of Image Processing algorithms, especially Edge Detection and Image Segmentation.
The final output of the conversion should result in an image file product. The deliverable will be the Verilog source code and a functioning image processing project that produces image files.