High-Speed Convolution Design
Budget: ₹600 – ₹1,500 INR
I'm seeking an experienced digital design engineer to create a 2D convolution hardware implementation for an image processing application. The goal is to achieve reduced computational area, power, and time without compromising performance.
**Core Requirements**
- Implement 4x4 matrix and 2x2 kernel convolution.
- Employ kogge stone adder for efficiency.
- Integrate vedic multiplier for rapid multiplication.
- Ensure system operates with integer value precision.
- Target design is for an FPGA using Verilog or VHDL.
**Ideal Skills**
- Proficiency in FPGA programming.
- Strong background in digital arithmetic circuits.
- Experience with kogge stone adders and vedic multipliers.
- Knowledge of image processing techniques.
- Use of Shifting , multiplication and addition in performing 2d convolution
- Fluent in Verilog or VHDL coding.
- Ability to optimize for power, area, and speed.
**Project Deliverables**
- Optimized HDL code for the convolution system.
- Synthesis and simulation results demonstrating performance.
- Documentation outlining design choices and testing procedures.
Freelancers interested in this project should have a proven track record with similar optimizations and be ready to discuss potential design trade-offs during the bid process. Looking forward to working with an expert who can contribute to an innovative and efficient convolution solution.
**Core Requirements**
- Implement 4x4 matrix and 2x2 kernel convolution.
- Employ kogge stone adder for efficiency.
- Integrate vedic multiplier for rapid multiplication.
- Ensure system operates with integer value precision.
- Target design is for an FPGA using Verilog or VHDL.
**Ideal Skills**
- Proficiency in FPGA programming.
- Strong background in digital arithmetic circuits.
- Experience with kogge stone adders and vedic multipliers.
- Knowledge of image processing techniques.
- Use of Shifting , multiplication and addition in performing 2d convolution
- Fluent in Verilog or VHDL coding.
- Ability to optimize for power, area, and speed.
**Project Deliverables**
- Optimized HDL code for the convolution system.
- Synthesis and simulation results demonstrating performance.
- Documentation outlining design choices and testing procedures.
Freelancers interested in this project should have a proven track record with similar optimizations and be ready to discuss potential design trade-offs during the bid process. Looking forward to working with an expert who can contribute to an innovative and efficient convolution solution.