FPGA design for PCI Express protocol in the Xilnix Virtex-7

We are looking for an experienced FPGA designer to create a design for the PCI Express protocol on the Xilinix Virtex-7. We're working on a project in which we have two Virtex-7 FPGA development boards, connecting them together directly through its on-board PCIe connectors using the AXI-PCIe IP core with MircoBlaze as processor designed in block diagram. In the design, one FPGA board programmed as a root complex, another board programmed to be an endpoint device. We're trying to make them communicate with each other; but, the root complex device isn't able to detect the end-point device and I don't have success to make them working.

Ideal skills and experience for this job include:

- Expertise in FPGA design and implementation
- Strong understanding of the PCI Express protocol
- Familiarity with Xilinix Virtex-7 and related tools and technologies
- Experience with signal processing applications and algorithms
- Understanding of how to design PCIe IP core in the block diagram
- Famailar with MircoBlaze and Vitis

If you are a skilled FPGA designer with experience in PCI Express, we would love to hear from you. Please provide examples of your previous work and relevant qualifications.