FPGA Based 8-bit Binary Up/Down Counter
Budget: $10 – $30 USD
I need a freelancer who can design an 8-bit up/down counter on an FPGA for me. This counter should be binary based and capable of interfacing with a 10MHz clock.
Key Requirements:
- Design an 8-bit binary up/down counter
- Implement 'clear' and 'load' features
- Synchronize with a 10MHz clock
Ideal Skills:
- Proficiency in FPGA development
- Experience with digital circuit design
- Familiarity with binary counter design
The counter should interface with an LED display for output. Please use a Xilinx FPGA platform for this project. The counter should reset to zero. Please ensure the counter can load a value from an input signal. The counter should be controlled using button input for up/down counting. Please use Verilog for the FPGA development.
Key Requirements:
- Design an 8-bit binary up/down counter
- Implement 'clear' and 'load' features
- Synchronize with a 10MHz clock
Ideal Skills:
- Proficiency in FPGA development
- Experience with digital circuit design
- Familiarity with binary counter design
The counter should interface with an LED display for output. Please use a Xilinx FPGA platform for this project. The counter should reset to zero. Please ensure the counter can load a value from an input signal. The counter should be controlled using button input for up/down counting. Please use Verilog for the FPGA development.