Egg Timer Verilog Code

Job ID: 32201543

Budget: $30 – $250 CAD

Design egg timer in verilog code as seen below.

Inputs to the FPGA include: 100MHz clock, BTNL/BTNR/BTNU/BTND push buttons, SW0/SW15 slide switches. Outputs from the FPGA include: LED0/LED1 LEDs and control signals for four seven segment displays.



The seven segment displays display the cook time in minutes (two left hand digits) and seconds (two right hand digits). LED0 is illuminated when the egg timer is enabled. LED1 blinks at a 1 second interval (i.e. one second on and then one second off) when the egg timer is active and counting down until it reaches a count of 0 minutes and 0 seconds.



When BTNL is pressed and held the programmed cook time can be changed by pressing BTNU (each press increments the minutes) and BTND (each press increments the seconds) until BTNL is released. Note the minutes and seconds counts will wrap around to 0 after they hit a maximum of 59. The maximum programmed cook time is therefore 59 minutes and 59 seconds. Also note that when BTNL is pressed, if the timer is currently active and counting down, it will stop and will not resume until the start button is pushed with the timer enable switch turned on.



When BTNR is pressed the egg timer will start counting down (note: the count down time will be displayed on the seven segment displays) and will count down from the programmed cook time value to 0 unless the cook time button (BTNL) is pushed or the timer enable switch is turned off, either of which will cause the programmed cook time to be displayed on the seven segment displays and LED1 to be turned off.



The BTNU/BTND push buttons should be debounced (i.e. do multiple samples of the button signal so that mechanical bouncing of the switch connection is ignored) so that the cook time is only incremented once for every button push.



SW0 enables (switch in forward position) or disables (switch in backward position) the egg timer. When the timer is enabled LED0 is on.



SW15 resets (switch in forward position) the egg timer circuits and sets the programmed cook time to 00:00 minutes and seconds with LED 1 off.
Related categories: Electronics Verilog / VHDL Microcontroller Arduino FPGA