Create a Verlilog Block Diagram
Budget: €8 – €10 EUR
The alarm system is to be applied on 3 windows and a door. Each window and the door has a sensor (switch) such that when it is opened, it will give logic level 1.
There is an on/off switch for the alarm which will be represented by the variable Y .
If we want to turn on the alarm switch, it will give logic level 1.
Otherwise, the off switch will give logic level 0.
The alarm system will be using a 7 segment display.
When the system is active, the display will show character A.
When the system is closed, the display will show character 0.
The switches below will be connected to each sensor output.
• sw[0] – window 0
• sw[1] – window 1
• sw[2] – window 2
• sw[3] – front door
• sw [4] – back door
sw[5] (Variable Y) will be the on/off switch and it will used to turn on the alarm system.
The variable A is defined as the output. This variable will have logic level 1 when a burglar triggers the alarm by activating a sensor which will light LED 1 and it will generate a buzz sound. The buzz sound can be generated by adding a square sin wave. (PMOD )
If 2 or more sensors are triggered within the same second, it is a false alarm, i.e. if the 2 or more switches open and close within the same second. To accomplish this, we need to monitor the input, determine when it changes and how long it lasts and make a decision at the end of it.
The alarm system should have a timing control. When the alarm is triggered with the buzz sound, and the character A on the 7 segment display, there should be a time limit of 15 minutes.
The alarm system should also have a test mode to check the alarm system. A separate indicator to show everything is working correctly.
The alarm system should have counters and decision making. It should detect when the switch is open, start a counter running, detect when the switch is closed and stop the counter. Based on the counter output value of less than a second, it should not turn off the alarm.
The alarm system should work as follows:
• Before any switch is turned on, the 7 segment display should display the character 0.
• When sw[5] is turned on, the alarm system is activated and the 7 segment display should display the character A.
• When the alarm is on, and if any of the following switches sw[0], sw[1], sw[2], sw[3] and sw[4] is turned on the LED light should turn on with a buzz sound.
• If 2 or more sensors are triggered within the same second, it is a false alarm, i.e. if the 2 or more switches open and close within the same second it should not set off the alarm.
• When the alarm is triggered with the buzz sound, and the character A on the 7 segment display, there should be a time limit of 15 minutes.
• The alarm system should also have a test mode to check the alarm system. A sperate indicator to show everything is working correctly.
Technology:
• FPGA Basys3 Board
• Vivado Software
• Verilog Code
There is an on/off switch for the alarm which will be represented by the variable Y .
If we want to turn on the alarm switch, it will give logic level 1.
Otherwise, the off switch will give logic level 0.
The alarm system will be using a 7 segment display.
When the system is active, the display will show character A.
When the system is closed, the display will show character 0.
The switches below will be connected to each sensor output.
• sw[0] – window 0
• sw[1] – window 1
• sw[2] – window 2
• sw[3] – front door
• sw [4] – back door
sw[5] (Variable Y) will be the on/off switch and it will used to turn on the alarm system.
The variable A is defined as the output. This variable will have logic level 1 when a burglar triggers the alarm by activating a sensor which will light LED 1 and it will generate a buzz sound. The buzz sound can be generated by adding a square sin wave. (PMOD )
If 2 or more sensors are triggered within the same second, it is a false alarm, i.e. if the 2 or more switches open and close within the same second. To accomplish this, we need to monitor the input, determine when it changes and how long it lasts and make a decision at the end of it.
The alarm system should have a timing control. When the alarm is triggered with the buzz sound, and the character A on the 7 segment display, there should be a time limit of 15 minutes.
The alarm system should also have a test mode to check the alarm system. A separate indicator to show everything is working correctly.
The alarm system should have counters and decision making. It should detect when the switch is open, start a counter running, detect when the switch is closed and stop the counter. Based on the counter output value of less than a second, it should not turn off the alarm.
The alarm system should work as follows:
• Before any switch is turned on, the 7 segment display should display the character 0.
• When sw[5] is turned on, the alarm system is activated and the 7 segment display should display the character A.
• When the alarm is on, and if any of the following switches sw[0], sw[1], sw[2], sw[3] and sw[4] is turned on the LED light should turn on with a buzz sound.
• If 2 or more sensors are triggered within the same second, it is a false alarm, i.e. if the 2 or more switches open and close within the same second it should not set off the alarm.
• When the alarm is triggered with the buzz sound, and the character A on the 7 segment display, there should be a time limit of 15 minutes.
• The alarm system should also have a test mode to check the alarm system. A sperate indicator to show everything is working correctly.
Technology:
• FPGA Basys3 Board
• Vivado Software
• Verilog Code