Build the simple VHDL testbench
Budget: $10 – $30 USD
Hi,
It is a problem to configure one circular loop block including this block and configure a test bench for it.
The algorithm is written in the c language.
This is a task that can be solved in less than an hour for someone who is familiar with the VHDL language.
The sample input and output values must be verified.
Details are in the attached file.
It is a problem to configure one circular loop block including this block and configure a test bench for it.
The algorithm is written in the c language.
This is a task that can be solved in less than an hour for someone who is familiar with the VHDL language.
The sample input and output values must be verified.
Details are in the attached file.