ASIC Verification

ASIC Verification Engg
Job Description:
1. Experience in Industry standard protocols ARM Interconnects(AHB, APB), SPI, UART, I2C, DMA, Serial Flash, Security and Encryption.
2. Full chip SoC (C and SV based), Subsystem and Block/IP level verification. Test Bench generation with ability to run embedded C programs. Must have experience of 2-3 SoC verification.
3. Experience in HDL(Verilog, VHDL) and HVL(System Verilog, Specman) based functional verification. Experience in code coverage.
4. Experience in Verification methodologies(UVM, OVM and eRM).
5.Mixed language simulation (Verilog-AMS, SystemVerilog).
6. Experience in Mentor, Cadence and Synopsys simulators.
7. Build automated Test bench and regression environments from a scratch. Should be able to write a test plan and generate test cases
8. Regression management and Verification Sign-off based on Functional Verification and Code Coverage.
9. Gate Level Simulation.
10. Generation of Bus Functional Models, Protocol monitors and checkers.
11. Power simulations using CPF/UPF.
Experience: 5-8 years or more