Quartus 64-bit Logic Assistance

I have already drafted a full set of requirements for a digital logic system and wrapped everything into a single reference file. The core of the assignment is a 64-bit truth table that must be explained in depth and paired with a clear, well-reasoned state diagram. All synthesis, simulation, and verification have to be done in Quartus Prime so that I can open the project and build upon it later.

What I need from you is twofold: first, the working design inside Quartus Prime—fully annotated, synthesizable and ready to compile—second, a custom-structured report that walks through the design decisions, the complete 64-bit truth table, the corresponding state transitions, and any simulation evidence that proves the implementation functions exactly as specified. Feel free to pick the HDL you prefer inside Quartus; consistency and clarity matter more to me than the language.

Deliverables should include:
• Quartus Prime project folder with all source files and test benches
• A PDF (or DOCX) report following the custom structure we’ll agree on, featuring the exhaustive truth table, neatly illustrated state diagram, design rationale, and simulation results

Send your proposed timeline and a quick note on how you usually document complex truth-table-driven designs, and we can get started right away.