Design 12-bit SAR ADC in 90nm CMOS
Budget: ₹10,000 – ₹11,000 INR
design a 12-bit Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) using 90 nm CMOS technology
Key Requirements:
- Develop a schematic capture of the 12-bit SAR ADC. - 1st Milestone
- Provide simulation snapshots and videos for functional, timing, and noise analysis. -2nd milestone
- Conduct a detailed noise analysis and performance evaluation. - 3rd Milestone
- Deliver all design files, simulation results, and documentation. - 4th Milestone
Key Requirements:
- Develop a schematic capture of the 12-bit SAR ADC. - 1st Milestone
- Provide simulation snapshots and videos for functional, timing, and noise analysis. -2nd milestone
- Conduct a detailed noise analysis and performance evaluation. - 3rd Milestone
- Deliver all design files, simulation results, and documentation. - 4th Milestone