Signal Processing
Budget: ₹12,500 – ₹37,500 INR
I have designed a custom PCB that picks up a small AC signal (~2V amplitude, 10 ns rise time, 250 ns decay) from a sensor operating on a high-voltage DC bias rail (up to 1500V). The signal is coupled off the HV rail via a capacitor into a three-stage op-amp amplifier. A working reference board exists with the same schematic. My board produces no output and I need an experienced analogue engineer to identify the fault and verify the design.
Circuit description
HV bias path
HV supply (positive, up to 1500V DC) → 10kΩ → 249Ω → signal node B → 1kΩ → sensor. Sensor return at GND. 27nF bypass cap directly across HV supply terminals. Signal current from sensor flows through 1kΩ, developing a voltage pulse at node B.
Signal path
Node B → 100nF HV-rated coupling cap → node S → 1kΩ to GND. From S into three-stage AD8065 amplifier: Stage 1 inverting (Rf=Rin=1kΩ, Av=−1), Stage 2 non-inverting (Av=+2), Stage 3 non-inverting (Av=+2). Total Av=−4. Output to BNC.
Observed symptoms
No signal visible at amplifier output when sensor is active
With op-amp disconnected, no pulse visible at node S on oscilloscope
Adding a 3pF capacitor across Stage 1 feedback resistor causes output to go flat zero — not oscillation, confirmed DC flat on scope
A working reference board with identical schematic produces correct output — confirms the design intent is valid
Scope of work
1 Review schematic and PCB layout — identify the likely root cause of no signal at node S
2 Advise on methodology to measure and compare stray capacitance at node B between the faulty and working boards
3 Verify the three-stage AD8065 design for stability, bandwidth, and gain — suggest component changes if needed
4 Provide a node-by-node test procedure to systematically isolate the fault
5 Optional: recommend any design improvements for better noise performance or signal integrity
Circuit description
HV bias path
HV supply (positive, up to 1500V DC) → 10kΩ → 249Ω → signal node B → 1kΩ → sensor. Sensor return at GND. 27nF bypass cap directly across HV supply terminals. Signal current from sensor flows through 1kΩ, developing a voltage pulse at node B.
Signal path
Node B → 100nF HV-rated coupling cap → node S → 1kΩ to GND. From S into three-stage AD8065 amplifier: Stage 1 inverting (Rf=Rin=1kΩ, Av=−1), Stage 2 non-inverting (Av=+2), Stage 3 non-inverting (Av=+2). Total Av=−4. Output to BNC.
Observed symptoms
No signal visible at amplifier output when sensor is active
With op-amp disconnected, no pulse visible at node S on oscilloscope
Adding a 3pF capacitor across Stage 1 feedback resistor causes output to go flat zero — not oscillation, confirmed DC flat on scope
A working reference board with identical schematic produces correct output — confirms the design intent is valid
Scope of work
1 Review schematic and PCB layout — identify the likely root cause of no signal at node S
2 Advise on methodology to measure and compare stray capacitance at node B between the faulty and working boards
3 Verify the three-stage AD8065 design for stability, bandwidth, and gain — suggest component changes if needed
4 Provide a node-by-node test procedure to systematically isolate the fault
5 Optional: recommend any design improvements for better noise performance or signal integrity