Design a 2-Channel High-Speed Timing Measurement Module (KiCad + Red Pitaya)
Budget: $30 – $250 USD
I need help completing a PCB project in KiCad.
The board is an extension module for a Red Pitaya STEMlab 125-14. Its purpose is to detect fast digital pulses on two SMA inputs, set threshold levels with onboard DACs, and measure the timing difference between the pulses with a dedicated TDC (TI TDC7200).
The project is already partly set up in KiCad using hierarchical sheets:
– Power (LP5907-3.3 with decoupling)
– Two input channels (LTC6754 comparators with π-pad input network and MCP4725 DAC thresholds)
– TDC7200 core with SPI interface
– BOM is already acquired
– Connector sheet for Red Pitaya header (5V, GND, SPI, I²C, optional interrupt)
Tasks include:
– Verify and correct schematic symbols (e.g. TDC7200 pin mapping)
– Wire hierarchical sheets cleanly with consistent labels
– Assign correct footprints (SMA edge connectors, SC70-6 comparators, SOT-23 DACs, TSSOP-14 TDC, etc.)
– Ensure ERC/DRC passes in KiCad
– Optionally complete the PCB layout (controlled-impedance traces, decoupling placement, ground plane, Red Pitaya header alignment)
Deliverables: an updated KiCad project (schematic + netlist, ERC-clean) and optionally a layout ready for fabrication (Gerbers, drill files, assembly files).
The board is an extension module for a Red Pitaya STEMlab 125-14. Its purpose is to detect fast digital pulses on two SMA inputs, set threshold levels with onboard DACs, and measure the timing difference between the pulses with a dedicated TDC (TI TDC7200).
The project is already partly set up in KiCad using hierarchical sheets:
– Power (LP5907-3.3 with decoupling)
– Two input channels (LTC6754 comparators with π-pad input network and MCP4725 DAC thresholds)
– TDC7200 core with SPI interface
– BOM is already acquired
– Connector sheet for Red Pitaya header (5V, GND, SPI, I²C, optional interrupt)
Tasks include:
– Verify and correct schematic symbols (e.g. TDC7200 pin mapping)
– Wire hierarchical sheets cleanly with consistent labels
– Assign correct footprints (SMA edge connectors, SC70-6 comparators, SOT-23 DACs, TSSOP-14 TDC, etc.)
– Ensure ERC/DRC passes in KiCad
– Optionally complete the PCB layout (controlled-impedance traces, decoupling placement, ground plane, Red Pitaya header alignment)
Deliverables: an updated KiCad project (schematic + netlist, ERC-clean) and optionally a layout ready for fabrication (Gerbers, drill files, assembly files).
Related categories:
Electronics
Electrical Engineering
PCB Layout
Digital Electronics
Embedded Systems
Signal Processing