High-Speed PCIe PCB Integrity Review

I have a multi-lane PCIe board laid out in KiCad and I want a sharp set of eyes on its signal integrity before we order production units. The schematic and layout are finished, so the assignment is strictly a design review with testing; no new routing or simulation work is required.

The focus is signal integrity. I’m particularly worried about EMI, crosstalk between adjacent differential pairs, and any impedance-matching missteps that could cause reflections or eye-diagram collapse. You’ll examine trace geometry, reference plane continuity, via transitions, connector breakouts and length matching, then validate your findings.

Deliverables
• An annotated copy of the KiCad project highlighting every issue found and recommended fixes.
• A concise test report (scope/TDR plots, eye diagrams, crosstalk measurements) that confirms any problems and shows pass/fail against PCIe requirements.
• A short summary of final action items so I can decide whether a quick spin is needed or we can proceed to fabrication.

There will most likely be another freelance opportunity depending on the results of this check.

I’ll supply the full KiCad project files and stack-up details.