ESP32 Low-Power Audio Device — Custom PC
Budget: $250 – $750 USD
Description
We're developing a battery-powered consumer audio device that plays pre-loaded audio recordings on a daily schedule (three fixed times per day). Audio quality is the #1 technical priority — every design decision (DAC selection, power delivery, speaker driving, trace routing) should prioritize clean, warm, rich audio reproduction.
This is Phase 1 — electronics design only. Enclosure design is a separate engagement.
Your deliverables are digital design files. We handle fabrication and assembly separately via JLCPCB, so your designs must be production-ready and JLCPCB-optimized. No enclosure work — that's a separate Phase 2 engagement.
Device Functionality
Plays a 2–3 minute audio recording at three scheduled times daily
3 toggle switches to enable/disable each scheduled time independently
Rotary switch to select from 8–12 audio recordings stored on onboard SPI flash
Volume control via rotary knob
Mute button — stops playback immediately
Test button — press to play the currently selected audio at current volume; press again to stop
Low battery indicator — LED blinks and a short audio tone plays before scheduled audio when battery is low
Time set once via small hidden display — no network sync, no app
Target: 1+ year battery life on 3–4 AA batteries using deep sleep
Technical Requirements
Microcontroller: ESP32-S3 (preferred) or STM32L4 — WiFi/BT disabled for maximum battery life. Open to candidate recommendations on optimal variant for ultra-low-power operation.
Real-Time Clock: DS3231 with coin cell backup (±2 ppm accuracy)
Audio Output: I2S DAC/amp (MAX98357A or better) + speaker connection header
Audio quality is critical to the product's value proposition
Must produce clean, warm playback — not tinny or distorted
Single forward-facing speaker, mounted behind a decorative grille in the enclosure
Speaker driver size ~1.5–2" for Sanctus model
Engineer must recommend a specific high-quality speaker driver in the BOM — this is a premium audio product, not a beeping alarm. Speaker selection should maximize clarity and warmth within the size and power constraints.
Include speaker mounting footprint in PCB documentation for enclosure designer handoff
Storage: Onboard SPI flash — W25Q128 (16MB) or W25Q256 (32MB) depending on audio format chosen. Must store 8–12 recordings of 2–3 minutes each. Engineer to recommend flash size based on audio format selection.
Audio Format: Engineer to recommend optimal format balancing audio quality, storage efficiency, firmware simplicity, and power consumption. Options include:
WAV (PCM or IMA ADPCM) — simplest decoding, higher storage
MP3 — smallest files (~0.75MB per 3-min recording), more firmware complexity
Must store 8–12 recordings of 2–3 minutes each within chosen flash size
We provide source audio (high-quality WAV); engineer specifies the encoding pipeline and final format for production.
Include format recommendation and storage math in your proposal.
Controls:
Rotary switches (audio selection + volume)
Toggle switches (3× scheduled times)
Push buttons (time setting)
Mute button (large, prominent)
Test button — momentary push button with pull-up resistor
Display: 4-digit 7-segment or 0.96" OLED (time setting only, hidden in base)
LED: Warm white or amber LED — used only for low battery warning (blink pattern) and setup/test feedback. Not a decorative or always-visible element.
Power: 3–4 AA batteries, deep sleep architecture, 1+ year target battery life. Candidate must provide power budget calculations demonstrating feasibility.
Battery Monitoring: Voltage divider (two resistors) on battery line → ESP32 ADC input. Firmware reads voltage on each wake cycle. When voltage drops below threshold (~1.0V/cell), trigger LED blink pattern + short audio tone before scheduled playback.
JLCPCB Optimization (Non-Negotiable)
Must use components from JLCPCB's parts library: https://jlcpcb.com/parts
Prefer "Basic" parts over "Extended" to minimize assembly fees
This directly affects manufacturing cost
Model-Agnostic Design
The PCB and firmware must work across three product sizes with minimal changes:
1. Small — Compact desk unit (4–5")
2. Medium — Mantel display (6–8") — PRIMARY TARGET
3. Large — Room display (10–12", USB-C powered)
Same PCB, same firmware. Only differences: speaker driver, power source (batteries vs USB-C), enclosure size. Design connector headers/jumpers where needed so one PCB serves all three. Note: Only the Sanctus (medium) is being prototyped now. The model-agnostic requirement ensures the same PCB can be reused in future variants without a redesign.
Test Button Specification
Single momentary push button (normally open)
10kΩ pull-up resistor to 3.3V
Software debouncing (20–50ms)
One ESP32 GPIO pin with interrupt capability
Behavior: Press wakes from deep sleep → plays full currently selected audio at current volume → press again to stop → returns to deep sleep after playback completes or 30 seconds of inactivity
Uses existing I2S DAC/amp — no additional audio hardware
LED provides feedback during test playback (confirms device is active)
Deliverables
1. Complete schematic files (KiCad preferred)
2. PCB layout files
3. JLCPCB manufacturing files (Gerbers, NC Drill, pick-and-place)
4. Bill of Materials with verified JLCPCB part numbers
5. Firmware source code (Arduino or ESP-IDF) — clean, commented, production-ready
Deep sleep + RTC wake + I2S audio playback
Scheduled playback at three configurable times
Test button handling
Bench-test mode for validating assembled boards (GPIO cycling, speaker test, battery voltage readout)
6. Power budget calculations — detailed breakdown proving 1+ year battery life target
7. Documentation (setup guide, programming instructions)
8. Per-unit cost estimate for 100-unit production run via JLCPCB
9. Scalability notes — how the design adapts across all three sizes
Audio Loading
Audio files must be loadable onto the SPI flash during manufacturing and for future content updates. Specify the method:
USB/UART via ESP32 (preferred — allows end-user updates without special tools)
SPI flash programmer (acceptable for manufacturing only)
Document the loading procedure in the setup guide
What We Provide
Complete product specification
Source WAV audio files (we handle recording; engineer specifies format/encoding requirements)
Direct access to project lead for questions
Milestone-based payment via platform milestone
Timeline: 2–4 weeks (propose your breakdown)
Payment: Platform escrow
Revisions: Budget includes 1 round of schematic review and 1 round of PCB layout revision
Verification bonus : Order a V1 prototype via JLCPCB, assemble and test at your own bench, and deliver verified design files with test results. We cover fab and shipping costs. Not required, but strongly preferred — candidates willing to verify their design will be weighted heavily in selection.
IP: All deliverables become client's exclusive property upon final payment
To Apply — Must Include:
☑ An ESP32 custom PCB project you've completed (show files or photos)
☑ Your approach to deep sleep + RTC wake + I2S audio
☑ Confirmation you can design for JLCPCB's parts library
☑ Proposed timeline with cost breakdown by milestone
☑ Include **'ANGELUS-ESP32'** in your proposal
☑ Any technical questions about the spec
Ideal Candidate
3+ years ESP32 development
Custom PCB design experience (not just dev boards)
I2S audio implementation experience
Low-power / battery optimization expertise
JLCPCB parts library familiarity
Clean, well-documented firmware
Responsive communication (replies within 24 hours)
Phase 1 of a two-phase project. Phase 2 (enclosure design) will be handled by a separate industrial designer once board dimensions are finalized. Fabrication via JLCPCB/PCBWay.
We're developing a battery-powered consumer audio device that plays pre-loaded audio recordings on a daily schedule (three fixed times per day). Audio quality is the #1 technical priority — every design decision (DAC selection, power delivery, speaker driving, trace routing) should prioritize clean, warm, rich audio reproduction.
This is Phase 1 — electronics design only. Enclosure design is a separate engagement.
Your deliverables are digital design files. We handle fabrication and assembly separately via JLCPCB, so your designs must be production-ready and JLCPCB-optimized. No enclosure work — that's a separate Phase 2 engagement.
Device Functionality
Plays a 2–3 minute audio recording at three scheduled times daily
3 toggle switches to enable/disable each scheduled time independently
Rotary switch to select from 8–12 audio recordings stored on onboard SPI flash
Volume control via rotary knob
Mute button — stops playback immediately
Test button — press to play the currently selected audio at current volume; press again to stop
Low battery indicator — LED blinks and a short audio tone plays before scheduled audio when battery is low
Time set once via small hidden display — no network sync, no app
Target: 1+ year battery life on 3–4 AA batteries using deep sleep
Technical Requirements
Microcontroller: ESP32-S3 (preferred) or STM32L4 — WiFi/BT disabled for maximum battery life. Open to candidate recommendations on optimal variant for ultra-low-power operation.
Real-Time Clock: DS3231 with coin cell backup (±2 ppm accuracy)
Audio Output: I2S DAC/amp (MAX98357A or better) + speaker connection header
Audio quality is critical to the product's value proposition
Must produce clean, warm playback — not tinny or distorted
Single forward-facing speaker, mounted behind a decorative grille in the enclosure
Speaker driver size ~1.5–2" for Sanctus model
Engineer must recommend a specific high-quality speaker driver in the BOM — this is a premium audio product, not a beeping alarm. Speaker selection should maximize clarity and warmth within the size and power constraints.
Include speaker mounting footprint in PCB documentation for enclosure designer handoff
Storage: Onboard SPI flash — W25Q128 (16MB) or W25Q256 (32MB) depending on audio format chosen. Must store 8–12 recordings of 2–3 minutes each. Engineer to recommend flash size based on audio format selection.
Audio Format: Engineer to recommend optimal format balancing audio quality, storage efficiency, firmware simplicity, and power consumption. Options include:
WAV (PCM or IMA ADPCM) — simplest decoding, higher storage
MP3 — smallest files (~0.75MB per 3-min recording), more firmware complexity
Must store 8–12 recordings of 2–3 minutes each within chosen flash size
We provide source audio (high-quality WAV); engineer specifies the encoding pipeline and final format for production.
Include format recommendation and storage math in your proposal.
Controls:
Rotary switches (audio selection + volume)
Toggle switches (3× scheduled times)
Push buttons (time setting)
Mute button (large, prominent)
Test button — momentary push button with pull-up resistor
Display: 4-digit 7-segment or 0.96" OLED (time setting only, hidden in base)
LED: Warm white or amber LED — used only for low battery warning (blink pattern) and setup/test feedback. Not a decorative or always-visible element.
Power: 3–4 AA batteries, deep sleep architecture, 1+ year target battery life. Candidate must provide power budget calculations demonstrating feasibility.
Battery Monitoring: Voltage divider (two resistors) on battery line → ESP32 ADC input. Firmware reads voltage on each wake cycle. When voltage drops below threshold (~1.0V/cell), trigger LED blink pattern + short audio tone before scheduled playback.
JLCPCB Optimization (Non-Negotiable)
Must use components from JLCPCB's parts library: https://jlcpcb.com/parts
Prefer "Basic" parts over "Extended" to minimize assembly fees
This directly affects manufacturing cost
Model-Agnostic Design
The PCB and firmware must work across three product sizes with minimal changes:
1. Small — Compact desk unit (4–5")
2. Medium — Mantel display (6–8") — PRIMARY TARGET
3. Large — Room display (10–12", USB-C powered)
Same PCB, same firmware. Only differences: speaker driver, power source (batteries vs USB-C), enclosure size. Design connector headers/jumpers where needed so one PCB serves all three. Note: Only the Sanctus (medium) is being prototyped now. The model-agnostic requirement ensures the same PCB can be reused in future variants without a redesign.
Test Button Specification
Single momentary push button (normally open)
10kΩ pull-up resistor to 3.3V
Software debouncing (20–50ms)
One ESP32 GPIO pin with interrupt capability
Behavior: Press wakes from deep sleep → plays full currently selected audio at current volume → press again to stop → returns to deep sleep after playback completes or 30 seconds of inactivity
Uses existing I2S DAC/amp — no additional audio hardware
LED provides feedback during test playback (confirms device is active)
Deliverables
1. Complete schematic files (KiCad preferred)
2. PCB layout files
3. JLCPCB manufacturing files (Gerbers, NC Drill, pick-and-place)
4. Bill of Materials with verified JLCPCB part numbers
5. Firmware source code (Arduino or ESP-IDF) — clean, commented, production-ready
Deep sleep + RTC wake + I2S audio playback
Scheduled playback at three configurable times
Test button handling
Bench-test mode for validating assembled boards (GPIO cycling, speaker test, battery voltage readout)
6. Power budget calculations — detailed breakdown proving 1+ year battery life target
7. Documentation (setup guide, programming instructions)
8. Per-unit cost estimate for 100-unit production run via JLCPCB
9. Scalability notes — how the design adapts across all three sizes
Audio Loading
Audio files must be loadable onto the SPI flash during manufacturing and for future content updates. Specify the method:
USB/UART via ESP32 (preferred — allows end-user updates without special tools)
SPI flash programmer (acceptable for manufacturing only)
Document the loading procedure in the setup guide
What We Provide
Complete product specification
Source WAV audio files (we handle recording; engineer specifies format/encoding requirements)
Direct access to project lead for questions
Milestone-based payment via platform milestone
Timeline: 2–4 weeks (propose your breakdown)
Payment: Platform escrow
Revisions: Budget includes 1 round of schematic review and 1 round of PCB layout revision
Verification bonus : Order a V1 prototype via JLCPCB, assemble and test at your own bench, and deliver verified design files with test results. We cover fab and shipping costs. Not required, but strongly preferred — candidates willing to verify their design will be weighted heavily in selection.
IP: All deliverables become client's exclusive property upon final payment
To Apply — Must Include:
☑ An ESP32 custom PCB project you've completed (show files or photos)
☑ Your approach to deep sleep + RTC wake + I2S audio
☑ Confirmation you can design for JLCPCB's parts library
☑ Proposed timeline with cost breakdown by milestone
☑ Include **'ANGELUS-ESP32'** in your proposal
☑ Any technical questions about the spec
Ideal Candidate
3+ years ESP32 development
Custom PCB design experience (not just dev boards)
I2S audio implementation experience
Low-power / battery optimization expertise
JLCPCB parts library familiarity
Clean, well-documented firmware
Responsive communication (replies within 24 hours)
Phase 1 of a two-phase project. Phase 2 (enclosure design) will be handled by a separate industrial designer once board dimensions are finalized. Fabrication via JLCPCB/PCBWay.