Power-Ready Multi-Layer Pogo PCB

I’m building a compact board that hosts an array of pogo pins and will serve a broader “pcb design” purpose rather than simple bench testing or programming alone. The stack-up must be multi-layer so we can tuck a clean power distribution network beneath the pin field while still leaving enough routing freedom for signals that break out to standard connectors.

Here’s what I need from you:
• Complete schematic capture and multi-layer layout in Altium, KiCad, or another industry-standard tool you’re comfortable with.
• Footprints for the chosen pogo pins (or recommendations if you see a better mechanical fit), along with any support hardware such as alignment posts or retention frames.
• A well-planned power plane arrangement: low impedance paths, proper decoupling, and clear labeling of rails so I can drop the board into different fixtures without second-guessing the pinout.
• Manufacturing outputs ready to hand straight to a board house: Gerbers, NC drill, pick-and-place, assembly drawings, and a clean BOM.
• Optional 3D step model export so I can verify mechanical clearance in SolidWorks.

If you spot improvements—layer count tweaks, via stitching patterns, or ferrite bead placement to tame noise—please call them out; I’m happy to iterate quickly. Board dimensions, current limits, and any pin pitch constraints will be supplied once we open the project, but feel free to flag questions now so nothing slips through the cracks.

I’ll sign off the job when the files import into my CAM viewer without errors and the design rule check passes tidy. Looking forward to seeing your approach on this power-focused pogo pin board.