Cmos digital ic design practicum
Budget: ₹600 – ₹1,500 INR
CMOS Inverter Design
A CMOS inverter can be designed with one PMOS in the pull up network and one NMOS in the pull down
network. The minimum size of the inverter is 1 ( 2:1 is the ratio of PMOS to NMOS width, width of PMOS
is twice of the NMOS). The goal of this experiment is to design a CMOS inverter and layout using Symica and
MAGIC tools. In this experiment you will be learning how to calculate the noise margin, propagation delay.
Then, estimating the power and energy consumption through spice simulations.
1. Design a CMOS inverter with the following specifications
(a) Noise margin, NML =
1
4
VDD
(b) Noise margin, NMH =
1
4
VDD
(c) switching threshold = 1
2
VDD
(d) Propagation delay, τp−lh = τp−hl
Report the values of the inverter sizes. Explain the procedure to estimate the noise margin, switching
threshold and propagation delay. Report the errors as a percentage in the report.
2. Vary the size of the inverter and calculate the switching threshold values. Show all the VTC curves in
a single simulation indicating the switching threshold. Give a comparison on inverter size Vs switching
threshold and comment on the behaviour with proper justification.
3. Estimate the propagation delay and power consumed for a CMOS inverter varying the input rise time as
10 ps, 100 ps and 1000 ps. Assume CL = 1.5fF.
4. Design a five stage ring oscillator and estimate the frequency of oscillation.
5. Draw the layout of a CMOS inverter (minimum size) and estimate the switching threshold. Also estimate
the propagation delay and power consumed by varying the input rise time as 10 ps, 100 ps and 1000 ps.
Assume CL = 1.5fF. Compare the layout results with the circuit simulation results.
Submission: Prepare a report (in latex) with the procedure followed to do the calculations and simulation plots.
Give all your calculated values in a table. Submit a pdf in Moodle. Give justification and reasons to the behaviour
of your plots. Extra marks will be given to those who present results effectively through plots and tables.
A CMOS inverter can be designed with one PMOS in the pull up network and one NMOS in the pull down
network. The minimum size of the inverter is 1 ( 2:1 is the ratio of PMOS to NMOS width, width of PMOS
is twice of the NMOS). The goal of this experiment is to design a CMOS inverter and layout using Symica and
MAGIC tools. In this experiment you will be learning how to calculate the noise margin, propagation delay.
Then, estimating the power and energy consumption through spice simulations.
1. Design a CMOS inverter with the following specifications
(a) Noise margin, NML =
1
4
VDD
(b) Noise margin, NMH =
1
4
VDD
(c) switching threshold = 1
2
VDD
(d) Propagation delay, τp−lh = τp−hl
Report the values of the inverter sizes. Explain the procedure to estimate the noise margin, switching
threshold and propagation delay. Report the errors as a percentage in the report.
2. Vary the size of the inverter and calculate the switching threshold values. Show all the VTC curves in
a single simulation indicating the switching threshold. Give a comparison on inverter size Vs switching
threshold and comment on the behaviour with proper justification.
3. Estimate the propagation delay and power consumed for a CMOS inverter varying the input rise time as
10 ps, 100 ps and 1000 ps. Assume CL = 1.5fF.
4. Design a five stage ring oscillator and estimate the frequency of oscillation.
5. Draw the layout of a CMOS inverter (minimum size) and estimate the switching threshold. Also estimate
the propagation delay and power consumed by varying the input rise time as 10 ps, 100 ps and 1000 ps.
Assume CL = 1.5fF. Compare the layout results with the circuit simulation results.
Submission: Prepare a report (in latex) with the procedure followed to do the calculations and simulation plots.
Give all your calculated values in a table. Submit a pdf in Moodle. Give justification and reasons to the behaviour
of your plots. Extra marks will be given to those who present results effectively through plots and tables.
Related categories:
MATLAB