Optimize Vitis HLS Code
Budget: $30 – $250 USD
Hi,
I am searching for a freelancer with experience in **parallelizing functions on hardware.** I wrote a fairly inefficient solution and would like to improve my skills. Ideally improve with **#pragma HLS dataflow** and **pipelining.** Right now I am unsure how to properly structure it. When to reuse BRAM etc. Ideally the implementation should have the same number of cycles regardless of the input array size.
Would be great if I found someone here. The code is attached :) Please mention some ideas and how you would start in your bid.
I am searching for a freelancer with experience in **parallelizing functions on hardware.** I wrote a fairly inefficient solution and would like to improve my skills. Ideally improve with **#pragma HLS dataflow** and **pipelining.** Right now I am unsure how to properly structure it. When to reuse BRAM etc. Ideally the implementation should have the same number of cycles regardless of the input array size.
Would be great if I found someone here. The code is attached :) Please mention some ideas and how you would start in your bid.