FPGA Power Conversion Consultation

I’m working on an FPGA-based power-electronics design that performs direct AC-to-AC conversion, and I’d like an experienced set of eyes on the project. Rather than a full redesign, I need targeted, practical suggestions that will help refine the existing architecture, tighten the control loops, and ensure the hardware description (VHDL/Verilog) and gate-level timing are truly aligned with the switching requirements of high-frequency power conversion.

Here’s what I’m looking for:

• A concise design review of the current top-level schematic, clocking scheme, and PWM generation logic.
• Specific, actionable recommendations for improving efficiency, reducing switching losses, and safeguarding against common AC-to-AC pitfalls such as commutation overlap and shoot-through.
• Guidance on test-bench strategies and simulation setups (ModelSim, Vivado, or your preferred tool) so I can stress the design under varying load and grid conditions before moving to hardware.
• If you spot a critical issue, a short, commented code snippet or timing constraint example that shows how you would correct it will be invaluable.

You don’t need to rewrite the whole design; clear, focused advice that I can implement myself is the goal. If this sounds like the kind of technical challenge you enjoy, let’s schedule a quick call so I can share the current project files and we can dive right in.