FPGA EMV and DSA Analysis

I have raw captures from both contact (ISO 7816) and contactless (ISO 14443) EMV cards fed directly into an FPGA test rig. My objective is two-fold: complete protocol interpretation of the traces and a thorough Differential Side-channel Analysis around the cryptographic routines.

For the protocol work you will decode every APDU, verify the cryptograms and give me a clear view of transaction validity. On the DSA side I expect you to pinpoint any leakage observable in the power or timing data and explain how it might be exploited.

Deliverables
1. Commented HDL (VHDL/Verilog/SystemVerilog) or equivalent scripts that ingest the captured signals and output human-readable traces for both card types.
2. Clear test results showing data being captured
3. A concise report detailing transaction validation results plus your DSA findings, complete with annotated graphs and evidence.
4. Practical recommendations for mitigation or deeper follow-up tests.

Let me know which FPGA toolchain (Vivado, Quartus, Lattice, etc.) you prefer and how many additional traces you would need for statistically significant DSA results. I’ll supply the existing data sets immediately after kickoff and can gather more if required.