FPGA-Based 32-Channel Logic Analyzer Creation
Budget: $250 – $750 USD
This unique opportunity involves the creation of a complex 32-channel logic analyzer using FPGA and providing the appropriate Verilog code.
- High-Speed Data Capturing: The system should be capable of clocked data capture at 200MHz or higher.
- PC Utility: The project includes the production of a suited PC Utility, specifically designed for Windows. This utility should be meticulously engineered to capture real-time data, save treasured data content, and thoroughly analyze vital capture data.
- Protocol Interpretation: Essential to the utility's operation is its smooth understanding of the common protocols including UART, SPI, I2C.
The ideal candidate will be proficient in FPGA programming and Verilog, with a sound background in Logic Analyzer systems. In-depth protocol understanding and remarkable exposure to Windows utility development is a must-have.
- High-Speed Data Capturing: The system should be capable of clocked data capture at 200MHz or higher.
- PC Utility: The project includes the production of a suited PC Utility, specifically designed for Windows. This utility should be meticulously engineered to capture real-time data, save treasured data content, and thoroughly analyze vital capture data.
- Protocol Interpretation: Essential to the utility's operation is its smooth understanding of the common protocols including UART, SPI, I2C.
The ideal candidate will be proficient in FPGA programming and Verilog, with a sound background in Logic Analyzer systems. In-depth protocol understanding and remarkable exposure to Windows utility development is a must-have.