Debug verilog code on my FPGA board
Budget: €2 – €6 EUR
I'm seeking assistance with debugging the Ethernet transmission logic on my TANG nano 20K FPGA board, which is connected to a Hanrun HR961160C module featuring the WIZnet W5500 chip. I am attempting to send an ARP request to my laptop via an Ethernet cable, but I am not receiving any packets. I have the code available and need a detailed code review and correction.
Key Requirements:
- Review and correct the Ethernet transmission logic in the provided code.
- Ensure proper configuration and operation of the W5500 chip.
- Identify and resolve any issues preventing successful ARP request transmission.
Ideal Skills and Experience:
- Strong understanding of FPGA programming and Ethernet protocols.
- Experience with the WIZnet W5500 Ethernet chip.
- Proficiency in debugging and correcting network communication code.
- Ability to provide clear, actionable feedback and corrections.
You can check the code that i have uploaded in the attachement
Key Requirements:
- Review and correct the Ethernet transmission logic in the provided code.
- Ensure proper configuration and operation of the W5500 chip.
- Identify and resolve any issues preventing successful ARP request transmission.
Ideal Skills and Experience:
- Strong understanding of FPGA programming and Ethernet protocols.
- Experience with the WIZnet W5500 Ethernet chip.
- Proficiency in debugging and correcting network communication code.
- Ability to provide clear, actionable feedback and corrections.
You can check the code that i have uploaded in the attachement