Simulink PWM for NPC Inverter
Budget: ₹12,500 – ₹37,500 INR
I need production-ready PWM firmware for a three-level neutral-point-clamped inverter, built and tested in Simulink, then auto-generated to run on a TMS320F28379D. Reliability is my overriding concern: every carrier cycle must be generated without dropouts, jitter, or pulse misplacement. Precise timing control on the C2000 core is therefore mandatory, so the code has to make disciplined use of the F28379D time-base sub-modules, EPWM trip-zones, and DMA where appropriate.
Here is how I picture the workflow and hand-off:
• Start from a Simulink model that reproduces the inverter’s three-level space-vector modulation, including dead-time and level-shifting logic.
• Configure Embedded Coder so the build flashes straight to the F28379D and can be inspected in Code Composer Studio.
• Provide a concise user block or script that exposes all key parameters—switching frequency, dead-time, carrier alignment—so I can retune them without touching the lower-level code.
• Demonstrate deterministic behaviour with an on-board scope capture or similar proof that the timing error stays below one system clock.
I already have the hardware on my bench and can run acceptance tests as soon as you deliver the build and a short read-me. If the first milestone performs as specified, I will extend the collaboration to cover fault detection and thermal monitoring on the same platform.
Here is how I picture the workflow and hand-off:
• Start from a Simulink model that reproduces the inverter’s three-level space-vector modulation, including dead-time and level-shifting logic.
• Configure Embedded Coder so the build flashes straight to the F28379D and can be inspected in Code Composer Studio.
• Provide a concise user block or script that exposes all key parameters—switching frequency, dead-time, carrier alignment—so I can retune them without touching the lower-level code.
• Demonstrate deterministic behaviour with an on-board scope capture or similar proof that the timing error stays below one system clock.
I already have the hardware on my bench and can run acceptance tests as soon as you deliver the build and a short read-me. If the first milestone performs as specified, I will extend the collaboration to cover fault detection and thermal monitoring on the same platform.