PCB Design - Ultra Low Power Automated Parking Barrier
Budget: $250 – $750 AUD
I’m building an ultra low battery-powered automated parking barrier and need an experienced PCB designer to take an existing design brief/spec, validate the design, and turn it into a manufacturable PCB + first assembled prototype. The goal is a production-ready prototype focused on ultra-low standby power and robust motor control.
Gold Coast Australian designer preferred but not mandatory.
Scope includes:
• Convert the design brief (block diagram, pin map, low-power rules, connector list) into a complete schematic and PCB layout.
• Design for ATmega328P (TQFP-32) @ 3.3V, USB-C programming via CP2102N (VBUS-only power), and 433MHz SRX882 RF receiver (power-gated).
• Implement high-current motor driver (PWM+DIR, nSLEEP, nFAULT) for a 12V geared motor, plus a magnetic encoder (JST-XH 6-pin, 2.5mm) and a close limit switch (home reference).
• Enforce strict low-power architecture: 3V3_AON always-on, gated rails RF_VCC / ENC_VCC / SENSE_VCC, and IO isolation to prevent back-powering (series resistors on RF/UART/sense, switched pullups on encoder A/B, no always-on LEDs, switched battery divider).
• Produce manufacturing outputs: Gerbers, drill files, BOM with MPNs, pick-and-place/CPL, assembly drawings, and design notes.
• Support initial prototype build via an Australian assembler (I’m planning to use a local PCB assembly house), including answering fab/assembly questions and revising files if needed.
Deliverable is a fully manufacturable design package ready for assembly, plus support through the first prototype run.
Component list provided for quoting, functional BOM with the key parts already locked (ATmega328P-AU TQFP-32 @ 3.3V, CP2102N USB-UART with USB-C, SRX882 433MHz ASK/OOK receiver, high-current motor driver with PWM+DIR+nSLEEP+nFAULT, and a JST-XH 2.5mm 6-pin motor/encoder connector). Some passive values and a small number of part numbers may be “TBD”.
I’ll also supply the design brief PDF with: pin mapping, low-power rules (power-gated rails + IO back-power prevention), connector pinouts, and a block placement diagram.
Gold Coast Australian designer preferred but not mandatory.
Scope includes:
• Convert the design brief (block diagram, pin map, low-power rules, connector list) into a complete schematic and PCB layout.
• Design for ATmega328P (TQFP-32) @ 3.3V, USB-C programming via CP2102N (VBUS-only power), and 433MHz SRX882 RF receiver (power-gated).
• Implement high-current motor driver (PWM+DIR, nSLEEP, nFAULT) for a 12V geared motor, plus a magnetic encoder (JST-XH 6-pin, 2.5mm) and a close limit switch (home reference).
• Enforce strict low-power architecture: 3V3_AON always-on, gated rails RF_VCC / ENC_VCC / SENSE_VCC, and IO isolation to prevent back-powering (series resistors on RF/UART/sense, switched pullups on encoder A/B, no always-on LEDs, switched battery divider).
• Produce manufacturing outputs: Gerbers, drill files, BOM with MPNs, pick-and-place/CPL, assembly drawings, and design notes.
• Support initial prototype build via an Australian assembler (I’m planning to use a local PCB assembly house), including answering fab/assembly questions and revising files if needed.
Deliverable is a fully manufacturable design package ready for assembly, plus support through the first prototype run.
Component list provided for quoting, functional BOM with the key parts already locked (ATmega328P-AU TQFP-32 @ 3.3V, CP2102N USB-UART with USB-C, SRX882 433MHz ASK/OOK receiver, high-current motor driver with PWM+DIR+nSLEEP+nFAULT, and a JST-XH 2.5mm 6-pin motor/encoder connector). Some passive values and a small number of part numbers may be “TBD”.
I’ll also supply the design brief PDF with: pin mapping, low-power rules (power-gated rails + IO back-power prevention), connector pinouts, and a block placement diagram.