ESP32-S3 to TI-84 PCB
Budget: $30 – $250 USD
Project: Compact PCB for XIAO ESP32-S3 Sense + TI-84 Link Port
I need a compact, production-ready PCB that integrates a Seeed Studio XIAO ESP32-S3 Sense module with a TI-84 calculator through the calculator’s 2-wire TIP/RING link port. The board’s main purpose is reliable power delivery and protected, stable communication between the ESP32-S3 and the TI-84. The firmware will use the TI Link / CBL2 protocol, so the PCB must provide the correct electrical interface for those lines.
Core Requirements
Power System
- Support safe power input from the intended source, such as an external Li-ion cell and/or calculator-side power if available.
- Regulate power for the XIAO ESP32-S3 Sense, camera, and any low-power support circuitry.
- Include reverse-polarity protection, over-current protection, and appropriate decoupling for ESP32 Wi-Fi and camera current spikes.
- Minimize quiescent current for battery-powered use.
- Prevent backfeeding into the calculator link port, USB, battery, or ESP32 GPIO rails.
TI-84 TIP/RING Communication
- Interface the ESP32-S3 to the TI-84 2-wire link port using the TI Link / CBL2 electrical signaling style.
- TIP and RING must be protected and level-safe for the ESP32-S3’s 3.3 V GPIO.
- Include ESD protection, current limiting, and appropriate open-drain/open-collector style line conditioning.
- The design must avoid damaging either the TI-84 or ESP32-S3 if the cable is plugged/unplugged during operation.
Camera and Module Integration
- Mount or connect the Seeed XIAO ESP32-S3 Sense cleanly.
- Preserve camera operation and image reliability.
- Keep camera and Wi-Fi power stability in mind during layout.
- Avoid blocking the ESP32-S3 antenna area and follow antenna keepout guidance.
Form Factor and Assembly
- Design for a minimal calculator-back-shell-friendly footprint.
- Use hand-assembly-tolerant components where practical.
- Provide clear silkscreen labels for power, programming, test points, TIP, RING, GND, and key GPIOs.
- Include mounting or alignment features if useful for fitting inside/onto the TI-84 shell.
Firmware and Debug Hooks
- Expose UART programming/debug pins.
- Add useful test pads for 3.3 V, GND, TIP, RING, battery/input voltage, regulator output, and selected spare GPIO.
- Reserve any pins needed for TI Link communication, camera operation, Wi-Fi/BLE, AI chat commands, OCR/image capture, and a small local web dashboard.
Deliverables
1. Complete KiCad or Altium schematic and PCB layout files
2. BOM with manufacturer part numbers and currently available production-stock parts
3. Gerbers, drill files, pick-and-place files, and assembly outputs ready for fabrication
4. Brief design report covering:
- power architecture
- estimated max current draw
- regulator/current-limit choices
- TIP/RING protection and level-shifting strategy
- ESD/backfeed protection
- ESP32 antenna keepout/layout notes
- known assumptions or risks
5. Basic hardware test firmware or test procedure that verifies:
- ESP32 boots reliably
- UART/programming works
- TIP/RING communication can echo or exchange simple TI Link / CBL2 packets
- camera can capture a frame
- Wi-Fi can be enabled during or near camera operation without brownouts/resets
Acceptance Criteria
- Schematic passes ERC with no unexplained critical warnings.
- PCB passes DRC and is ready for fabrication.
- Assembly files are complete and consistent with the BOM.
- Board can power the XIAO ESP32-S3 Sense and camera reliably.
- TIP/RING interface works with the TI-84 without damaging either device.
- Camera capture succeeds while Wi-Fi is enabled.
- Current draw stays within the limits stated in the design report.
- Antenna placement does not obviously degrade Wi-Fi/BLE performance compared with normal XIAO ESP32-S3 Sense usage.
Important Notes
- The TI-84 link port is not UART, I2C, or SPI. It uses the TI Link / CBL2 protocol over two bidirectional TIP/RING lines.
- ESP32-S3 GPIO is 3.3 V only, so the calculator link interface must be protected and level-safe.
- Reliability matters more than making the board as small as physically possible.
I need a compact, production-ready PCB that integrates a Seeed Studio XIAO ESP32-S3 Sense module with a TI-84 calculator through the calculator’s 2-wire TIP/RING link port. The board’s main purpose is reliable power delivery and protected, stable communication between the ESP32-S3 and the TI-84. The firmware will use the TI Link / CBL2 protocol, so the PCB must provide the correct electrical interface for those lines.
Core Requirements
Power System
- Support safe power input from the intended source, such as an external Li-ion cell and/or calculator-side power if available.
- Regulate power for the XIAO ESP32-S3 Sense, camera, and any low-power support circuitry.
- Include reverse-polarity protection, over-current protection, and appropriate decoupling for ESP32 Wi-Fi and camera current spikes.
- Minimize quiescent current for battery-powered use.
- Prevent backfeeding into the calculator link port, USB, battery, or ESP32 GPIO rails.
TI-84 TIP/RING Communication
- Interface the ESP32-S3 to the TI-84 2-wire link port using the TI Link / CBL2 electrical signaling style.
- TIP and RING must be protected and level-safe for the ESP32-S3’s 3.3 V GPIO.
- Include ESD protection, current limiting, and appropriate open-drain/open-collector style line conditioning.
- The design must avoid damaging either the TI-84 or ESP32-S3 if the cable is plugged/unplugged during operation.
Camera and Module Integration
- Mount or connect the Seeed XIAO ESP32-S3 Sense cleanly.
- Preserve camera operation and image reliability.
- Keep camera and Wi-Fi power stability in mind during layout.
- Avoid blocking the ESP32-S3 antenna area and follow antenna keepout guidance.
Form Factor and Assembly
- Design for a minimal calculator-back-shell-friendly footprint.
- Use hand-assembly-tolerant components where practical.
- Provide clear silkscreen labels for power, programming, test points, TIP, RING, GND, and key GPIOs.
- Include mounting or alignment features if useful for fitting inside/onto the TI-84 shell.
Firmware and Debug Hooks
- Expose UART programming/debug pins.
- Add useful test pads for 3.3 V, GND, TIP, RING, battery/input voltage, regulator output, and selected spare GPIO.
- Reserve any pins needed for TI Link communication, camera operation, Wi-Fi/BLE, AI chat commands, OCR/image capture, and a small local web dashboard.
Deliverables
1. Complete KiCad or Altium schematic and PCB layout files
2. BOM with manufacturer part numbers and currently available production-stock parts
3. Gerbers, drill files, pick-and-place files, and assembly outputs ready for fabrication
4. Brief design report covering:
- power architecture
- estimated max current draw
- regulator/current-limit choices
- TIP/RING protection and level-shifting strategy
- ESD/backfeed protection
- ESP32 antenna keepout/layout notes
- known assumptions or risks
5. Basic hardware test firmware or test procedure that verifies:
- ESP32 boots reliably
- UART/programming works
- TIP/RING communication can echo or exchange simple TI Link / CBL2 packets
- camera can capture a frame
- Wi-Fi can be enabled during or near camera operation without brownouts/resets
Acceptance Criteria
- Schematic passes ERC with no unexplained critical warnings.
- PCB passes DRC and is ready for fabrication.
- Assembly files are complete and consistent with the BOM.
- Board can power the XIAO ESP32-S3 Sense and camera reliably.
- TIP/RING interface works with the TI-84 without damaging either device.
- Camera capture succeeds while Wi-Fi is enabled.
- Current draw stays within the limits stated in the design report.
- Antenna placement does not obviously degrade Wi-Fi/BLE performance compared with normal XIAO ESP32-S3 Sense usage.
Important Notes
- The TI-84 link port is not UART, I2C, or SPI. It uses the TI Link / CBL2 protocol over two bidirectional TIP/RING lines.
- ESP32-S3 GPIO is 3.3 V only, so the calculator link interface must be protected and level-safe.
- Reliability matters more than making the board as small as physically possible.